Commit Graph

265 Commits

Author SHA1 Message Date
Pascal Paillet 967a8e63c3 feat(stm32mp1): register fixed regulator
Register fixed regulator in BL2.

Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier c39c658e75 refactor(st): update CPU and VDD voltage get
Use regulator framework to get CPU and VDD power supplies.

Change-Id: Ice745fb21ff10e71ef811e747165499c2e19253e
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Nicolas Le Bayon ae7792e058 refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after initialize_pmic() in BL2.

Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier bba9fdee58 feat(stm32mp1): add regulator framework compilation
Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.

Change-Id: I9dc7a0a4c4f5a23d9bedda368d407612c9cd21cd
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier 0c16e7d2fb refactor(stm32mp1): re-order drivers init
SYSCFG can be initialized later, after console is up, to display the
warnings or messages it could issue.
PMIC should be initialized earlier, before SYSCFG init.

Change-Id: Icc3a1366083a1b1fde7f0e173645449b4c04c49b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier 33667d299b feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2021-12-22 13:08:09 +01:00
Gabriel Fernandez 847c6bc8e6 feat(clk): add a minimal clock framework
This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compiled for STM32MP1.

Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2021-12-22 13:07:23 +01:00
Yann Gautier ff7675ebf9 fix(stm32mp1): correct include order
Warnings about header files include order were triggered by CI.
Correct the include order to mathc CI requirements.

Change-Id: Iaca959add924e0e1fa2e56fab2348f0ee36e5fa7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-17 09:53:04 +01:00
Madhukar Pappireddy 7468be1274 Merge changes from topic "fconf_get_index" into integration
* changes:
  feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
  feat(fconf): add a helper to get image index
2021-12-14 20:58:09 +01:00
Yann Gautier acf28c267b feat(st): protect UART during platform init
Protect the UART instance used for serial boot
with UART used for console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ieee1557b34e7baa81594c3fbf0513191737027bf
2021-12-14 11:34:16 +01:00
Yann Gautier aafff04354 feat(stm32mp1): update console management for SP_min
Use stm32mp_uart_console_setup() in SP_min setup.
Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add
CONSOLE_FLAG_RUNTIME under DEBUG.

Change-Id: Ib2d35c8d285dafb680aa218872ad679cbf43d0ed
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier 86240942fa refactor(stm32mp1): improve console management in BL2
Use newly created function stm32mp_uart_console_setup().
And remove now useless code.

Change-Id: Ib8d0319d3f4f54309848bc225b58608cea73bad9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier 53612f7293 feat(plat/st): add a function to configure console
To ease console configuration, a dedicated function is created:
stm32mp_uart_console_setup(). The code will also be common for the
different BLs.

Change-Id: Idf3cad756f125ca2313cf30b1311637a9df8f27f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier a6bfa75cf2 feat(stm32mp1): add stm32_get_boot_interface function
Add function stm32_get_boot_interface to get the current boot interface
from information saved in the TAMP register.

Change-Id: I23af43c68eeaebe4c45920a57d739117aea3fbb1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier 4dc77a35e3 refactor(stm32mp1): move stm32_save_boot_interface()
The function stm32_save_boot_interface()is moved to stm32mp1_private.c
file. The files stm32mp1_context.{c,h} are removed.
As return is always 0, change the function to return void.
Call it earlier, to be able to use it when configuring console.

Change-Id: I8986e1257dc8e8708eab044a51ea1f2426b16597
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier d7176f0319 fix(stm32mp1): deconfigure UART RX pins
Those pins are configured by ROM code, for serial boot use cases.
Their configs are reset if the boot is done on UART, but not on USB.
This should then be done in TF-A. This has to be done after clock
init, and before console is configured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I29a9694e25fcf1665360dd71f73937f769c43b52
2021-12-14 09:25:19 +01:00
Yann Gautier 737ad29bf9 feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
2021-12-14 09:25:19 +01:00
Yann Gautier ce21ee89d4 refactor(stm32mp1): sort compilation flags
Sort the compilation flags in platform.mk when checking and defining
them for C files.

Change-Id: I5a08399c89ede4c0bd8697045706122732205db5
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier c10f3a4559 feat(stm32mp1): add sign-compare warning
Add -Wsign-compare to TF_CFLAGS to check signedness comparison during
STM32MP1 platform compilation.

Change-Id: I4cada49622f44258d3e0da4560a566de9c7d54b3
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier b706608642 feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
Thanks to dyn_cfg_dtb_info_get_index(), we can check if TOS_FW_CONFIG
is inside the FIP partition. If not we can skip its treatment when
populating FIP images.

Change-Id: If5623eabd1ba484549d4a908d4a6f43325b36875
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-13 17:37:57 +01:00
Patrick Delaunay 9083fa11ea feat(plat/st): add STM32MP_UART_PROGRAMMER target
Handle boot from UART with STM32CubeProgammer based on mmap io
for STM32MP15.

Depends-On: Iba84e8dfd67b9f30416efb0f6778e48ba1f75dad
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ibd719dd46a11da78633728675ef6639635b6cf67
2021-12-03 09:26:11 +01:00
Patrick Delaunay fb3e7985c9 feat(plat/st): add STM32CubeProgrammer support on UART
Add a file to support the STMicroelectronics tool STM32CubeProgrammer
over UART in BL2 for STM32MP15x platform.

This tools is based on protocol defined in AN5275,
"USB DFU/USART protocols used in STM32MP1 Series bootloaders"
based on STM32 MCU protocols (AN3155, "USART protocol used
in the STM32 bootloader").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I956c95d8de0a94d1eb8e61f043651dae7b838170
2021-12-03 09:26:11 +01:00
Madhukar Pappireddy 2e43638e95 Merge changes from topic "st_usb" into integration
* changes:
  fix(drivers/usb): add a optional ops get_other_speed_config_desc
  fix(drivers/usb): remove unnecessary cast
2021-11-09 06:03:32 +01:00
Yann Gautier 325376eb81 refactor(stm32mp1): use fconf.mk
Update STM32MP1 platform.mk file to include fconf.mk.

Change-Id: Idc623a832b4cdf9486835fc612803015f4f1a5f5
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-11-05 13:32:32 +01:00
Patrick Delaunay 216c1223c2 fix(drivers/usb): add a optional ops get_other_speed_config_desc
Correctly handle USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION request
in USB driver and support a different result than
USB_DESC_TYPE_CONFIGURATION with the new optional ops
get_other_speed_config_desc().

The support of this descriptor is optionnal and is only
required when high-speed capable device which can operate at its
other possible speed.

This patch allows to remove the pbuf update in usb_core_get_desc()
and solves an issue on USB re-enumeration on STM32MP15 platform
as the result of get_config_desc() is a const array.
This issue is not see on normal use-case, as the USB enumeration
is only done in ROM code and TF-A reuse the same USB descritors.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8edcc1e45065ab4e45d48f4bc37b49120674fdb0
2021-11-05 11:28:59 +02:00
Yann Gautier 306dcd6b0d fix(plat/st): remove double space
Replace double space with single space in stm32cubeprogrammer_usb.c.

Change-Id: I717b136119e85fe8e25dd540758525f995200458
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-11-03 08:50:37 +01:00
Patrick Delaunay fa92fef0a0 feat(plat/st/stm32mp1): add STM32MP_USB_PROGRAMMER target
Add a support of USB as serial boot devices for STM32MP15x platform:
the FIP file is provide by STM32CubeProgrammer with the DFU protocol,
loaded in DDR at DWL_BUFFER_BASE address and then the io memmap is used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I272c17c458ff1e9d0780f8fa22330c8a35533d19
2021-10-29 16:44:03 +02:00
Patrick Delaunay 942f6be211 feat(plat/st/stm32mp1): add USB DFU support for STM32MP1
Add the USB descriptor, the struct used for USB enumeration with
the function usb_dfu_plat_init().

The USB support is based on the usb lib and on the stm32mp1 usb driver.

The content of enumeration (the string descriptor) is identical to
ROM code to avoid the USB reset en re-enumeration needs.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I18b40649e8df83813a5a340b0eee44c9a3470e43
2021-10-29 16:43:57 +02:00
Patrick Delaunay afad5214a7 feat(plat/st): add STM32CubeProgrammer support on USB
Add a file to support over USB the STMicroelectronics tool
STM32CubeProgrammer in BL2 for STM32MP15x platform.

This tools is based on DFU stack.

Change-Id: I48a8f772cb0e9b8be24c06847f724f0470c0f917
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-29 16:43:49 +02:00
Patrick Delaunay efbd65fa7b feat(plat/st): add a USB DFU stack
Add a stack to support the Universal Serial Bus Device Class
Specification for Device Firmware Upgrade (USB DFU v1.1).

This stack is based on the USB device stack (USBD).

Change-Id: I8a56411d184882b6a9e3617c6dfb859086b8f353
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-29 16:43:36 +02:00
Chris Kay 1fa05dab07 build(fdt-wrappers): introduce FDT wrappers makefile
This has been introduced to simplify dependencies on the FDT wrappers.
We generally want to avoid pulling in components on a file-by-file
basis, particularly as we are trying to draw conceptual boxes around
components in preparation for transitioning the build system to CMake,
where dependencies are modelled on libraries rather than files.

Signed-off-by: Chris Kay <chris.kay@arm.com>
Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5
2021-10-26 12:14:28 +01:00
Mark Dykes 3deb060015 Merge changes from topic "st_dt_match_instance" into integration
* changes:
  refactor(stm32_sdmmc2): use DT helpers
  feat(plat/st): create new helper for DT access
2021-10-15 20:53:01 +02:00
Manish Pandey 02d36a92fc Merge "fix(plat/st): only check header major when booting" into integration 2021-10-15 13:48:10 +02:00
Mark Dykes 09665c8348 Merge "fix(plat/st): correct signedness comparison issue" into integration 2021-10-14 23:25:28 +02:00
Yann Gautier 7684dddcfb fix(stm32mp1): add bl prefix for internal linker script
Due to patch [1], the bl prefix was removed from the build macros.
It should then add explicitly when compiling stm32mp1.ld.S.

[1] 434d0491c5 ("refactor(makefile): remove BL prefixes in build macros")

Change-Id: I298dba2a7c958dd4ea6429c83ed4b1ee97e1735f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-07 14:24:38 +02:00
Yann Gautier 5657decc7f fix(plat/st): correct signedness comparison issue
Add casts where required to avoid compialtion error when enabling
-Wsign-compare in shared resources file.
The assert is also corrected to match the correct range (change ||
to &&).

Change-Id: Ie4c9c0c935d39ff9a2165b909172aacb3e94ab4d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-07 09:26:27 +02:00
Nicolas Le Bayon 8ce8918745 fix(plat/st): only check header major when booting
An STM32 image with the awaited header major version shouldn't be forbid
to boot. If the minor differs, then it means only non-mandatory options
have been added in the reserved fields, and the header remains backward
compatible.

Change-Id: Iff16b67f95c728e2f1d128bd1760a4be497c5ca3
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 11:09:21 +02:00
Yann Gautier ea97bbf6a0 feat(plat/st): create new helper for DT access
dt_match_instance_by_compatible() gives the DT node offset in DT
that matches both compatible and the peripheral instance address.

Change-Id: Ia85f4f4aa8fe8efd4df310d765e7586e67aa34c2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 10:56:07 +02:00
Yann Gautier b38e2ed29e fix(plat/st): add UART reset in crash console init
Add the reset set/clear sequence at the beginning of the function
plat_crash_console_init(). If not done, there is a risk that the UART
is in a bad state and will not be able to print correct characters.

Change-Id: Id31e28773d6c4f26f16d3569d1e3c5aa0e26e039
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-09-20 13:57:10 +02:00
Lionel Debieve 4584e01dc6 feat(plat/st): add a new DDR firewall management
Based on FCONF framework, define DDR firewall regions
from firmware config file instead of static defines.

Change-Id: I471e15410ca286d9079a86e3dc3474f66d37b5ab
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-08 09:05:16 +02:00
Yann Gautier 3cc5155c84 refactor(plat/st): use TZC400 bindings
This avoids duplicate define of TZC_REGION_NSEC_ALL_ACCESS_RDWR.
And remove the previous TZC400 definitions from stm32mp1_def.h.

Change-Id: I6c72c2a18731f69d855fbce8ce822a21da9364fa
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier d5a84eeaac feat(plat/st): manage io_policies with FCONF
Introduced IO policies management through the trusted
boot firmware config device tree for UUID references.

Change-Id: Ibeeabede51b0514ebba26dbbdae587363b2aa0a7
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 29332bcd68 feat(plat/st): use FCONF to configure platform
Add required code to support FCONF on STM32MP1 platform.
The new FW_CONFIG DT file will be inside the FIP, and loaded by BL2.
It will be used to configure the addresses where to load other binaries.
BL2 should be agnostic of which BL32 is in the FIP (OP-TEE or SP_min),
so optee_utils.c is always compiled, and some OP-TEE flags are removed.

Change-Id: Id957b49b0117864136250bfc416664f815043ada
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 18b415be9d feat(plat/st): improve FIP image loading from MMC
Instead of using a scratch buffer of 512 bytes, we can directly use the
image address and max size. The mmc_block_dev_spec struct info is then
overwritten for each image with this info, except FW_CONFIG and GPT
table which will still use the scratch buffer.
This allows using multiple blocks read on MMC, and so improves the boot
time.
A cache invalidate is required for the remaining data not used from the
first and last blocks read. It is not required for FW_CONFIG_ID,
as it is in scratch buffer in SYSRAM, and also because bl_mem_params
struct is overwritten in this case. This should also not be done if
the image is not found (OP-TEE extra binaries when using SP_min).

Change-Id: If3ecfdfe35bb9db66284036ca49c4bd1be4fd121
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 1d204ee4ab feat(plat/st): use FIP to load images
BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.

The previous way of booting is still available, the compilation flag
STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files
are duplicated and their names modified with _stm32_ to avoid too much
switches in the code.

Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 84090d2ca4 refactor(plat/st): updates for OP-TEE
Protect BL32 (SP_min) with MMU if OP-TEE is not used.
Validate OP-TEE header with optee_header_is_valid().
Use default values in bl2_mem_params_descs[]. They will be overwritten
in bl2_plat_handle_post_image_load() if OP-TEE is used.

Change-Id: I8614f3a17caa827561614d0f25f30ee90c4ec3fe
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-06 13:21:54 +02:00
Yann Gautier 99080bd127 fix(plat/st): apply security at the end of BL2
Now that the DDR is mapped secured, the security settings (TZC400
firewall) have to be applied at the end of BL2 for the OP-TEE case.
This is required to avoid checskum computation error on U-Boot binary,
for which MMU and TZC400 would not be aligned.

Change-Id: I4a364f7117960e8fae1b579f341b9f140b766ea6
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-08-17 09:10:51 +02:00
Yann Gautier 7e87ba2598 feat(plat/st): add helper to save boot interface
Some parameters from BootROM boot context can be required after boot.
To save space in SYSRAM, this context can be overwritten during images
load sequence. The needed information (here the boot interface) is
then saved in a local variable.

Change-Id: I5e1ad4630ccf78480f415a0a83939005ae67729e
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-07-13 18:16:55 +02:00
Lionel Debieve 91ffc1deff fix(plat/st): improve DDR get size function
Avoid parsing device tree every time when returning
the DDR size.
A cache flush on this size is also added because TZC400 configuration
is applied at the end of BL2 after MMU and data cache being turned off.
Configuration needs to retrieve the DDR size to generate the correct
region. Access to the size fails because the value is still in the data
cache. Flushing the size is mandatory.

Change-Id: I3dd1958f37d806f9c15a5d4151968935f6fe642e
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-07-13 18:16:55 +02:00
Yann Gautier c1ad41fbf7 refactor(plat/st): map DDR secure at boot
In BL2, the DDR can be mapped as secured in MMU, as no other SW
has access to it during its execution.
The TZC400 configuration is also updated to reflect this. When using
OP-TEE, the TZC400 is reconfigured at the end of BL2, to match OP-TEE
mapping. Else, SP_min will be in charge to reconfigure TZC400 to set
DDR non-secure.

Change-Id: Ic5ec614b218f733796feeab1cdc425d28cc7c103
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-07-13 18:16:55 +02:00
Yann Gautier b230b3f2dd refactor(plat/st): rework TZC400 configuration
Add new static functions to factorize code in stm32mp1_security.c.

Change-Id: Ifa5a1aaf7c56c25dba9a0ab8e985496d7cb06990
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-07-13 18:16:55 +02:00
Madhukar Pappireddy 23b7ad5cc0 Merge changes from topic "stm32_io_update" into integration
* changes:
  refactor(plat/st): add stm32image_io_setup
  fix(plat/st): panic if boot interface is wrong
2021-07-07 03:09:54 +02:00
Patrick Delaunay c25ff16ecf refactor(plat/st): add stm32image_io_setup
Add a generic function to setup the stm32image IO.

Change-Id: I0f7cf4a6030605037643f3119b809e0319d926af
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-30 17:07:10 +02:00
Yann Gautier 71693a6634 fix(plat/st): panic if boot interface is wrong
Add a panic() at the end of stm32mp_io_setup() if the boot interface
given in ROM code boot context is not supported.

Change-Id: I0d50f21a11231febd21041b6e63108cc3e6f4f0c
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-30 17:04:22 +02:00
Yann Gautier f22350583c fix(plat/st): add STM32IMAGE_SRC
The dependency on this macro was added by patch [1]. But the macro
itself was forgotten in the patch.

 [1] 128e0b3e2e ("stm32mp1: update rules for stm32image tool")

Change-Id: I49219e1e13828b97b95f404983da33ef4567fe23
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-22 14:10:27 +02:00
Yann Gautier c2d18ca80f fix(plat/st): correct IO compensation disabling
In stm32mp1_syscfg_disable_io_compensation(), to disable the IO
compensation cell, we have to set the corresponding bit in
SYSCFG_CMPENCLRR register, instead of clearing the bit in SETR register.

Change-Id: I510a50451f8afb9e98c24e1ea84efbf73a39e6b4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Nicolas Le Bayon 72c7884092 fix(plat/st): correct BSEC error code management
BSEC services should return SMC error codes as other IDs (defined in
stm32mp1_smc.h) and not BSEC driver ones. So that non-secure caller
is able to treat them correctly.

In global SMC handler, unknown ID should also return a value from this
definition list, and not the generic one, which seems not well adapted
for our needs.

Two unsigned values initializations are also changed from 0 to 0U.

Change-Id: Ib6fd3866a748cefad1d13d48f7be38241621023e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-06-22 14:10:27 +02:00
Madhukar Pappireddy 6db111968c Merge "refactor(plat/st): check boot device only for BL2" into integration 2021-06-17 23:44:07 +02:00
Manish Pandey 5d582ff936 Merge "refactor(plat/st): avoid fixed DT address" into integration 2021-06-16 23:23:30 +02:00
Manish Pandey 2a0087796f Merge changes from topic "soc_id" into integration
* changes:
  refactor(plat/nvidia): use SOC_ID defines
  refactor(plat/mediatek): use SOC_ID defines
  refactor(plat/arm): use SOC_ID defines
  feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
  refactor(plat/st): export functions to get SoC information
  feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
2021-06-16 12:03:17 +02:00
Yann Gautier c20b060661 refactor(plat/st): avoid fixed DT address
Device Tree address is now a parameter for dt_open_and_check() function.
This will allow better flexibility when introducing PIE and FIP.
The fdt pointer is now only assigned if the given address holds
a valid device tree file. This allows removing the fdt_checked variable,
as we now check fdt is not null.

Change-Id: I04cbb2fc05c9c711ae1c77d56368dbeb6dd4b01a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-04 15:05:05 +02:00
Yann Gautier d3b0e8702a refactor(plat/st): check boot device only for BL2
The boot device is now checked inside a dedicated rule, that is only
called during BL2 compilation step

Change-Id: Ie7bcd1f166285224b0c042238989a82f7b6105c6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-04 15:03:35 +02:00
Vyacheslav Yurkov 214c8a8d08 feat(plat/st): add STM32MP_EMMC_BOOT option
Added a new STM32MP_EMMC_BOOT option, which is used to look for SSBL in
the same eMMC boot partition TF-A booted from at a fixed 256k offset. In
case STM32 image header is not found, the boot process rolls back to a
GPT partition look-up scheme.

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: I85a87dc9ae7f2b915ed8e584be80f4b3588efc48
2021-06-04 10:10:51 +02:00
Yann Gautier 3f916a412a refactor(plat/st): remove io_dummy code for OP-TEE
The io_dummy code and function calls are only used in case BL32 is TF-A
SP_min, and not OP-TEE. This code in bl2_io_storage can then be put under
#ifndef AARCH32_SP_OPTEE.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I52787a775160b335f97547203f653419621f5147
2021-06-03 10:48:57 +02:00
Yann Gautier e1db570a30 refactor(plat/st): remove BL2 image loading
STM32MP1 does not use BL1, the loading of BL2 is done by ROM code. It is
then useless to have an entry BL2_IMAGE_ID in the policies.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I464cedf588114d60522433123f8dbef32ae36818
2021-06-03 10:45:17 +02:00
Yann Gautier 06c3b100ea refactor(plat/st): rename OP-TEE pager to core
OPTEE_PAGER defines are renamed OPTEE_CORE.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4c28d3b0a6ed843088a3ef06e3e348ce689fabde
2021-06-03 10:43:42 +02:00
Yann Gautier 3d201787e8 feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
The JEDEC information for STMicroelectronics is:
JEDEC_ST_MFID U(0x20)
JEDEC_ST_BKID U(0x0)
And rely on platform functions to get chip IP and revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4fa4ac8bb5583b1871b768decc9fe08e8966ff54
2021-05-27 09:54:59 +02:00
Yann Gautier 92661e01cf refactor(plat/st): export functions to get SoC information
Three functions are exported to get SoC version, SoC device ID, and SoC
name. Those functions are based on reworked existing static functions.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1f3949062bb488286a9e7a38ffcd1457953dac56
2021-05-27 09:54:59 +02:00
Yann Gautier f714ca80b8 plat/st: do not rely on tainted value for dt property length
To compare the "okay" string of a property, strncmp is used but with the
length given by fdt_getprop. This len value is reported as tainted by
Coverity [1]. We just can use strlen("okay") which is a known value
to compare the 2 strings.

 [1] https://scan4.coverity.com/reports.htm#v51972/p11439/fileInstanceId=96515154&defectInstanceId=14219121&mergedDefectId=342997

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ic8fb6ccf3126a37df615e433eb028861812015da
2021-04-29 17:57:47 +02:00
Yann Gautier 62fbb31516 stm32mp1: enable PIE for BL32
In order to prepare future support of FIP, BL32 (SP_min) is compiled
as Position Independent Executable.

Change-Id: I15e7cc433fb03e1833002f4fe2eaecb6ed42eb47
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-04-21 15:05:57 +02:00
Yann Gautier d2130da2b5 stm32mp1: set BL sizes regardless of flags
BL2 size is set to 100kB, and BL32 to 72kB, regardless of OP-TEE
or stack protector flags.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Id7411bd55a4140718d64a647d81037720615fc81
2021-04-21 15:05:57 +02:00
Yann Gautier cddf1bd765 plat/st: do not keep mmc_device_info in stack
Create a dedicated static struct mmc_device_info mmc_info mmc_info
instead of having this in stack.
A boot issue has been seen on some platform when applying patch [1].

 [1] 13f3c5166f ("mmc:prevent accessing to the released space in case of wrong usage")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I73a079715253699d903721c865d6470d58f6bd30
2021-04-08 08:44:57 +02:00
Yann Gautier 236fc428bb stm32mp1: add TZC400 interrupt management
TZC400 is configured to raise an interrupt in case of faulty access.
Call the new added tzc400_it_handler, in case this interrupt occurs.

Change-Id: Iaf4fa408a8eff99498042e11e2d6177bad39868c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-03-23 13:06:15 +01:00
Yann Gautier 1e80c49810 stm32mp1: use TZC400 macro to describe filters
On STM32MP15, only filters 0 and 1 are used.
Use TZC_400_REGION_ATTR_FILTER_BIT() macro for those 2 filters 0 and 1
instead of U(3).

Change-Id: Ibc61823842ade680f59d5b66b8db59b6a30080e4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-03-23 13:06:15 +01:00
Madhukar Pappireddy 26dccba6dd Merge changes from topic "scmi-msg" into integration
* changes:
  doc: maintainers: add scmi server
  drivers: move scmi-msg out of st
2021-01-27 15:14:46 +00:00
Yann Gautier aeb727f3bf stm32mp1: correct plat_crash_console_flush()
The base address of UART peripheral should be given in R0, not in R1.
Otherwise the console_stm32_core_flush issues an assert message.
This issue was highlighted with recent changes in console flush functions.

Change-Id: Iead01986fdbbf30ad2fd9fa515a1d2b611b4e591
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-01-22 11:42:54 +01:00
Peng Fan b473430898 drivers: move scmi-msg out of st
Make the scmi-msg driver reused by others.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I5bc35fd4dab70f45c09b8aab65af4209cf23b124
2021-01-20 11:37:14 +08:00
Mark Dykes dfe577a817 Merge "Don't return error information from console_flush" into integration 2020-10-14 18:59:27 +00:00
Yann Gautier ab049ec07a stm32mp1: use %u in NOTICE message for board info
The board information values, read in an OTP are never negative,
%u is then used instead of %d.

Change-Id: I3bc22401fb4d54666ddf56411f75b79aca738492
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-13 18:05:23 +02:00
Yann Gautier ade9ce03b8 stm32mp1: get peripheral base address from a define
Retrieve peripheral base address from a define instead of
parsing the device tree. The goal is to improve execution time.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2588c53ad3d4abcc3d7fe156458434a7940dd72b
2020-10-13 11:27:40 +02:00
Patrick Delaunay f964f5c363 stm32mp1: add finished good variant in board identifier
Update the board info with the new coding including the finished good
variant:

Board: MBxxxx Var<CPN>.<FG> Rev.<Rev>-<BOM>

The OTP 59 coding is:
bit [31:16] (hex) => MBxxxx
bit [15:12] (dec) => Variant CPN (1....15)
bit [11:8]  (dec) => Revision board (index with A = 1, Z = 26)
bit [7:4]   (dec) => Variant FG : finished good (NEW)
bit [3:0]   (dec) => BOM (01, .... 255)

Change-Id: I4fbc0c84596419d1bc30d166311444ece1d9123f
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-13 11:27:40 +02:00
Nicolas Le Bayon d75a340977 stm32mp1: add asserts in get_cpu_package() and get_part_number()
Change-Id: I2b702698d6be93da5ac86da1cbc98b3838315a5a
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-13 11:27:40 +02:00
Lionel Debieve 8ccf4954bf stm32mp1: add support for new SoC profiles
Update to support new part numbers.

Add new STM32 MPUs Part = STM32MP151F, STM32MP153F, STM32MP157F,
STM32MP151D, STM32MP153D, STM32MP157D

The STM32MP1 series is available in 3 different lines which are pin-to-pin
compatible:
- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
              3D GPU, DSI display interface and CAN FD
- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
              and CAN FD
- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz

Each line comes with a security option (cryptography & secure boot)
& a Cortex-A frequency option :

- A      Basic + Cortex-A7 @ 650 MHz
- C      Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- D      Basic + Cortex-A7 @ 800 MHz
- F      Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz

Remove useless variable in stm32mp_is_single_core().

Change-Id: Id30c836af986c6340c91efa8a7ae9480a2827089
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-13 11:27:40 +02:00
Lionel Debieve ffb3f27713 stm32mp1: support of STM32MP15x Rev.Z
Add a new revision of STM32MP15x CPU (Rev.Z).

Change-Id: I227dd6d9b3fcc43270015cfb21f60aeb0a8ab658
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-13 11:27:40 +02:00
Jimmy Brisson 831b0e9824 Don't return error information from console_flush
And from crash_console_flush.

We ignore the error information return by console_flush in _every_
place where we call it, and casting the return type to void does not
work around the MISRA violation that this causes. Instead, we collect
the error information from the driver (to avoid changing that API), and
don't return it to the caller.

Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
2020-10-09 10:21:50 -05:00
Yann Gautier 38b2304158 stm32mp1: cosmetics in platform.mk
Remove some useless extra tabs or spaces.
Replace some spaces with tabs.

Change-Id: I0e8e2a1a1be7a1109ba7f3e3ae35e3fe1b5b4552
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-09 09:24:55 +00:00
Yann Gautier 128e0b3e2e stm32mp1: update rules for stm32image tool
In heavy parallel builds, it has sometimes been seen issues with the
tool not generated before it was needed. Change some rules order and
dependency to solve that.

Change-Id: I8f4b4f46a2ea0fe496bc66bca47c66d1c81d3c99
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-09 09:24:50 +00:00
Yann Gautier 3e0727d6de stm32mp1: add macros to define PLAT_PARTITION_MAX_ENTRIES
There were fixed values when computing PLAT_PARTITION_MAX_ENTRIES.
Use STM32_BL33_PARTS_NUM and STM32_RUNTIME_PARTS_NUM. The first one is
for the number of copies of BL33. The second one depends on the use case
SP_min or OP-TEE. For OP-TEE, there are 3 partitions. For SP_min, as it
is in the same binary as BL2, it is set to 0. It will be set to 1 if
BL32 is in a separate binary.

Change-Id: Iba4d8ec5fbc713bebfbdcd9f9426c3fded20d3ad
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-09 09:24:45 +00:00
Yann Gautier 2eaffd51a6 stm32mp1: sort platform.mk
First put Makefile variables definition, then definitions for each feature,
then C flags, then source files, then compilation rules.

Change-Id: I238115ea2fe4ebafccd2135979814c27932c34e2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-09 09:24:40 +00:00
Yann Gautier 49e2373cf9 stm32mp1: use ASFLAGS for binary paths
To simplify the rule that creates the concatenated binary, use ASFLAGS
instead of adding all paths in the AS command line. This allows a better
management if a binary is not present.

Change-Id: Ic8b4566e7dedc6f55be355a92e3b214cef138d9b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-09 09:24:33 +00:00
Yann Gautier 276a9c1bf8 stm32mp1: use internal MAKE_LD macro to generate stm32 linker files
The previous proprietary version was not correctly handling dependencies.
Using MAKE_LD from make_helpers files now correctly handles that.
The generated linker script is the same as before.

Change-Id: Iccfd8dc3fffa7a33e73b184b72e0dfd5d26bc9c9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-10-09 09:24:27 +00:00
Madhukar Pappireddy dc57bea007 Merge "fdts: stm32mp1: realign device tree with kernel" into integration 2020-10-02 15:07:26 +00:00
Yann Gautier 277d6af561 fdts: stm32mp1: realign device tree with kernel
There is one dtsi file per SoC version:
- STM32MP151: common part for all version, Single Cortex-A7
- STM32MP153: Dual Cortex-A7
- STM32MP157: + GPU and DSI, but not needed for TF-A

The STM32MP15xC include a cryptography peripheral, add it in a dedicated
file.

There are 4 packages available, for which  the IOs number change. Have one
file for each package. The 2 packages AB and AD are added.

STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common
dkx file is then created.

Some reordering is done in other files, and realign with kernel DT files.

The DDR files are generated with our internal tool, no changes in the
registers values.

Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:07:57 +02:00
Yann Gautier 4170079ae0 stm32mp1: correct crash console GPIO alternate configuration
If GPIO port for UART TX is less than 8, the register GPIO_AFRL should
be used to set the alternate. GPIO_AFRH is used if GPIO port is greater
or equal to 8. The macro GPIO_TX_ALT_SHIFT is removed and the GPIO port
number is tested against GPIO_ALT_LOWER_LIMIT (=8) in
plat_crash_console_init() function.

Change-Id: Ibb62223ed6bce589bbcab59a5e986b2677e6d118
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Yann Gautier 6397423ed4 stm32mp1: add plat_panic_handler function
The STM32MP1 implementation of this function will call
plat_report_exception(). It displays more information about the panic
if DEBUG is enabled.
The LR register is also filled with R6 content, which hold the faulty
address. This allows debugger to reconstruct the backtrace.

Change-Id: I6710e8e2ab6658b05c5bbad2f3c545f07f355afb
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Yann Gautier a9eda77c22 stm32mp1: update plat_report_exception
In case DEBUG is enabled, plat_report_exception will now display extra
information of the cause of the exception.

Change-Id: I72cc9d180959cbf31c13821dd051eaf4462b733e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Leonardo Sandoval 327131c4c7 build_macros.mk: include assert and define loop macros
Loop macros make it easier for developers to include new variables to
assert or define and also help code code readability on makefiles.

Change-Id: I0d21d6e67b3eca8976c4d856ac8ccc02c8bb5ffa
Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
2020-09-14 09:27:53 -05:00
Yann Gautier 33c91baf90 stm32mp1: use newly introduced GICv2 makefile
Include the GICv2 makefile in STM32MP1 SP_min makefile, and use
${GICV2_SOURCES} instead of taking drivers/arm/gic files directly.

Change-Id: Ibcaed5b0bd17f6d8cf200e208c11cc10cd6d2ee5
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-08-14 18:56:44 +02:00
Etienne Carriere fdaaaeb431 stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-07-16 17:36:18 +02:00
Etienne Carriere ec8f4212ac stm32mp1: register shared resource per GPIO bank/pin
Introduce helper functions stm32mp_register_secure_gpio() and
stm32mp_register_non_secure_gpio() for drivers to register a
GPIO pin as secure or non-secure.

These functions are stubbed when shared resource driver is not
embedded in the BL image so that drivers do not bother whether they
shall register or not their resources.

Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-07-08 12:56:09 +02:00