Commit Graph

24 Commits

Author SHA1 Message Date
Rex-BC Chen 3b994a7530 feat(plat/mdeiatek/mt8195): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans
flip-flops and dumps to internal RAM on the WDT reset.
After system reboots, those values could be showed for
debugging.

BUG=b:192429713

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I02c6c862b6217bc84c83a09b533bd53ec19b06f7
2021-09-28 10:13:47 +08:00
Rex-BC Chen 85e4d14df1 fix(plat/mediatek/mt8195): fix coverity fail
Add break to correct the driver flow.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ie20f402d543fbf90172671e007fad30d5dc2ab10
2021-09-17 09:55:21 +08:00
Penny Jan 75edd34ade feat(plat/mediatek/mt8195): add EMI MPU basic drivers
EMI MPU stands for external memory interface memory protect unit.
MT8195 supports 32 regions and 16 domains.
We add basic drivers currently, and will add more setting for
EMI MPU in next patch.

Change-Id: Iedc19d8f6fcf1ceb2d8241319b8dc17c885642dd
Signed-off-by: Penny Jan <penny.jan@mediatek.com>
2021-09-15 10:59:14 +08:00
Dawei Chien d562130ea9 feat(plat/mediatek/mt8195): add vcore-dvfs support
Add DVFSRC init flow.

Change-Id: Ic5fc78c91359abc12c0f54b01860a7cbe41f3358
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
2021-09-14 10:24:12 +08:00
Garmin Chang 1f81cccedd fix(plat/mediatek/me8195): fix error setting for SPM
There is a error setting for SPM, so we need to fix this issue.

Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>
Change-Id: I741a5dc1505a831fe48fd5bc3da9904db14c8a57
2021-07-20 02:55:46 +01:00
Garmin Chang 49d3bd8c4c feat(plat/mediatek/mt8195): add DCM driver
DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related DCM by default.

Change-Id: I3237199bc217bd3682f51d31284db5fd0324b396
Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>
2021-07-06 14:59:06 +08:00
Edward-JW Yang 859e346b89 feat(plat/mediatek/mt8195): add SPM suspend driver
Support DRAM/MAINPLL/26M off when system suspend.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Ib8502f9b0b4e47aa405e5449f0b6d483bd3f5d77
2021-07-02 16:22:16 +08:00
Edward-JW Yang d336e093dd feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
Add drivers to support MCUSYS off when system suspend.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: I388fd2318f471083158992464ecdf2181fc7d87a
2021-07-02 16:22:16 +08:00
Elly Chiang 048189637e feat(plat/mediatek/mt8195): add support for PTP3
Add PTP3 drivers to protect CPU excessive voltage drop
in CPU heavy loading.

Change-Id: I7bd37912c32d5328ba0287fccc8409794bd19c1d
Signed-off-by: Elly Chiang <elly.chiang@mediatek.com>
2021-07-02 16:22:16 +08:00
Tinghan Shen 9ff8b8ca93 fix(plat/mediatek/mt8195): extend MMU region size
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn't include in the MMU mapping region. It triggers MMU faults.

This patch extends the MMU region 0 size to cover all mt8195 HW modules.
This patch also remove MMU region 1 because region 0 covers region 1.

Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
2021-07-02 16:22:16 +08:00
Rex-BC Chen 7eb4223757 feat(plat/mdeiatek/mt8195): add display port control in SiP service
MTK display port mute/unmute control registers need to be
set in secure world.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Iec73650e937bd20e25c18fa28d55ae29e68b10d3
2021-05-26 02:13:56 +01:00
Yidi Lin c52a10a28e mediatek: mt8195: add rtc power off sequence
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the
driver with mt8195.

Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 10:00:05 +08:00
Yidi Lin 0909819a4f mediatek: mt8195: add power-off support
mt8195 also uses PMIC mt6359p. The only difference is the
pwrap register definition.

Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 10:00:05 +08:00
Yidi Lin fcc6617398 mediatek: mt8195: Add reboot function for PSCI
Add system_reset function in PSCI ops

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I177796e30198b0a53402093ee0917dda43074385
2021-04-23 10:00:04 +08:00
mtk20895 aebd4dc8ff mediatek: mt8195: Add gpio driver
Add gpio driver.

Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com>
Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211
2021-04-23 10:00:04 +08:00
Yidi Lin 938fd425d1 mediatek: mt8195: Add SiP service
Add the basic SiP service

Change-Id: I21fe9d85eac4be9101b12c4b6c28294c5b93cb5f
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 10:00:04 +08:00
James Liao fe98542843 mediatek: mt8195: Add CPU hotplug and MCDI support
Implement PSCI platform OPs to support CPU hotplug and MCDI.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I1321f7989c8a3d116d698768a7146e8f180ee9c0
2021-04-23 10:00:04 +08:00
James Liao acc855488e mediatek: mt8195: Add MCDI drivers
Add MCDI related drivers to handle CPU powered on/off in CPU suspend.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I6a6f9bf5d1d8bda1ee603d8bf3fc206437de7ad8
2021-04-23 10:00:04 +08:00
James Liao 0d82eff6fb mediatek: mt8195: Add SPMC driver
Add SPMC driver for CPU power on/off.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: If47d7f3f3b9965f3c0402ea6cdb917ad1d16bb32
2021-04-23 10:00:04 +08:00
Yidi Lin 65f0dd138e mediatek: mt8195: Initialize delay_timer
Initialize delay_timer for delay functions.

Change-Id: Ib554135151f8b5c642b5a6511c942bb9efc0a47f
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 10:00:04 +08:00
Yidi Lin 9155077738 mediatek: mt8195: initialize systimer
Change-Id: I7e0fbd04b0cdf5da92b8ef39737342f2d66f5f10
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 10:00:04 +08:00
gtk_pangao e5490f9557 mediatek: mt8195: add sys_cirq support
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common
common folder.

Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com>
Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
2021-04-23 10:00:04 +08:00
christine.zhu c63f1451e2 mediatek: mt8195: initialize GIC
MT8192 GIC driver can be shared with MT8195. Move GIC driver to common
and do the initialization.

Signed-off-by: christine.zhu <christine.zhu@mediatek.corp-partner.google.com>
Change-Id: I63f3e668b5ca6df8bcf17b5cd4d53fa84f330fed
2021-04-23 10:00:04 +08:00
Yidi Lin 174a1cfecd Initialize platform for MediaTek MT8195
- Add basic platform setup
- Add MT8195 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address

Change-Id: I7978e2f32e58900e5cf93f741ee8eaf8b8e3b842
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 09:59:59 +08:00