Commit Graph

62 Commits

Author SHA1 Message Date
Teddy Reed e59a3bffe4 hikey: Add development TBB support
This patch adds experimental support for TRUSTED_BOARD_BOOT to the
Hikey. This is adapted from the RPi3 and QEMU implementations.

Since the Hikey starts from BL2 the TRUSTED_BOARD_BOOT ROT begins there
too. When TRUSTED_BOARD_BOOT is defined, the BL1 build is skipped.

See the following example:

make \
 PLAT=hikey \
 BL33=u-boot.bin \
 SCP_BL2=mcuimage.bin \
 TRUSTED_BOARD_BOOT=1 \
 MBEDTLS_DIR=../../mbedtls \
 GENERATE_COT=1 \
 all fip

Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
2018-07-06 07:54:38 -04:00
Roberto Vargas 033648652f Make TF UUID RFC 4122 compliant
RFC4122 defines that fields are stored in network order (big endian),
but TF-A stores them in machine order (little endian by default in TF-A).
We cannot change the future UUIDs that are already generated, but we can store
all the bytes using arrays and modify fiptool to generate the UUIDs with
the correct byte order.

Change-Id: I97be2d3168d91f4dee7ccfafc533ea55ff33e46f
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-06-14 14:41:00 +01:00
Masahiro Yamada 0a2d5b43c8 types: use int-ll64 for both aarch32 and aarch64
Since commit 031dbb1224 ("AArch32: Add essential Arch helpers"),
it is difficult to use consistent format strings for printf() family
between aarch32 and aarch64.

For example, uint64_t is defined as 'unsigned long long' for aarch32
and as 'unsigned long' for aarch64.  Likewise, uintptr_t is defined
as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64.

A problem typically arises when you use printf() in common code.

One solution could be, to cast the arguments to a type long enough
for both architectures.  For example, if 'val' is uint64_t type,
like this:

  printf("val = %llx\n", (unsigned long long)val);

Or, somebody may suggest to use a macro provided by <inttypes.h>,
like this:

  printf("val = %" PRIx64 "\n", val);

But, both would make the code ugly.

The solution adopted in Linux kernel is to use the same typedefs for
all architectures.  The fixed integer types in the kernel-space have
been unified into int-ll64, like follows:

    typedef signed char           int8_t;
    typedef unsigned char         uint8_t;

    typedef signed short          int16_t;
    typedef unsigned short        uint16_t;

    typedef signed int            int32_t;
    typedef unsigned int          uint32_t;

    typedef signed long long      int64_t;
    typedef unsigned long long    uint64_t;

[ Linux commit: 0c79a8e29b5fcbcbfd611daf9d500cfad8370fcf ]

This gets along with the codebase shared between 32 bit and 64 bit,
with the data model called ILP32, LP64, respectively.

The width for primitive types is defined as follows:

                   ILP32           LP64
    int            32              32
    long           32              64
    long long      64              64
    pointer        32              64

'long long' is 64 bit for both, so it is used for defining uint64_t.
'long' has the same width as pointer, so for uintptr_t.

We still need an ifdef conditional for (s)size_t.

All 64 bit architectures use "unsigned long" size_t, and most 32 bit
architectures use "unsigned int" size_t.  H8/300, S/390 are known as
exceptions; they use "unsigned long" size_t despite their architecture
is 32 bit.

One idea for simplification might be to define size_t as 'unsigned long'
across architectures, then forbid the use of "%z" string format.
However, this would cause a distortion between size_t and sizeof()
operator.  We have unknowledge about the native type of sizeof(), so
we need a guess of it anyway.  I want the following formula to always
return 1:

  __builtin_types_compatible_p(size_t, typeof(sizeof(int)))

Fortunately, ARM is probably a majority case.  As far as I know, all
32 bit ARM compilers use "unsigned int" size_t.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-27 18:35:02 +09:00
Haojian Zhuang ed253f54da hikey: clean sram before mcu used
Clean cache to flush parameters into SRAM before MCU using them.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-04-11 19:06:14 +08:00
Haojian Zhuang 1d999558cf hikey: save ddr parameters into SRAM
Store those DDR parameters into SRAM. They may be used by MCU
firmware.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-04-11 19:05:59 +08:00
Haojian Zhuang 483dce7eef hikey: update ddr initialization
Fix that DDR can't work at 533MHz. Now step to set DDR frequency
from 150MHz to 800MHz. DDR could work among these frequency, 150MHz,
266MHz, 400MHz, 533MHz and 800MHz.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-04-11 19:05:32 +08:00
Dimitris Papastamos 6ab136c258
Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements
Fix switch statements to comply with MISRA rules
2018-03-29 13:20:05 +01:00
Dimitris Papastamos e74af2afd0
Merge pull request #1335 from JoelHutton/jh/cleanup_void_pointers
Clean usage of void pointers to access symbols
2018-03-29 09:59:52 +01:00
Joel Hutton 9f85f9e379 Clean usage of void pointers to access symbols
Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to aligned pointer values. To remove this restriction an
IMPORT_SYM macro has been introduced, which declares it as a char
pointer and casts it to the required type.

Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
2018-03-27 13:20:27 +01:00
Jonathan Wright 649c48f5dc plat: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in plat comply with MISRA
rules 16.1 - 16.7.

Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
2018-03-26 12:43:05 +01:00
Michael Brandl 4368ae07ba plat/hikey: boot memory layout to dedicated file
Boot memory layout is specific for a platform, but should not be
mixed up with other platform specific attributes. A separate file is
much cleaner and better to compare with other platforms. Take a look
at plat/poplar where it is done the same way.

Moved hikey_def.h to system include folder and moved includes from
hikey_def.h to more general platform_def.h.

Signed-off-by: Michael Brandl <git@fineon.pw>
2018-03-12 13:19:00 +01:00
davidcunado-arm bf35944bf6
Merge pull request #1277 from hzhuang1/testing/bl2_el3_v0.6
hikey: migrate to BL2_EL3
2018-03-08 10:39:52 +00:00
Haojian Zhuang 84b589c9e7 hikey: fix build issue with CLANG
plat/hisilicon/hikey/hikey_bl1_setup.c:565:47:
error: value size does not match register size specified by the
constraint and modifier [-Werror,-Wasm-operand-widths]
        __asm__ volatile ("mrs  %0, cpacr_el1" : "=r"(data));

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-03-06 17:59:47 +08:00
Haojian Zhuang 054c3e0fa3 hikey: move out duplicated code
Create hikey_bl_common.c to store duplicated initialization
code in BL1 and BL2.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-03-05 13:03:53 +08:00
Haojian Zhuang a628b1ab2a hikey: migrate to bl2_el3
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC),
replace BL1 by BL2_EL3 in normal boot mode.

When we recovery images in recovery mode, keep to use BL1.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-03-05 09:51:43 +08:00
Haojian Zhuang a9b3021e14 hikey: clean dcache for SRAM after initialized
Although SRAM is initialized, DCACHE should be cleaned too.
Because MCU is a parrallel core to access SRAM. We need to make
sure that initialized value is really written to SRAM before
MCU using it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-03-05 09:51:33 +08:00
Haojian Zhuang 103c213c0d hikey: drop LOAD_IMAGE v1
Since LOAD_IMAGE_V2 is always enabled in HiKey platform. Drop
LOAD_IMAGE v1 to simplify code.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-03-05 09:50:47 +08:00
David Cunado 5724481fdd Update ULL() macro and instances of ull to comply with MISRA
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes.

This patch resolves this for the ULL() macro by using ULL suffix instead
of the ull suffix.

Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01
Signed-off-by: David Cunado <david.cunado@arm.com>
2018-02-27 17:05:51 +00:00
Victor Chong 3b12a6fc8e hikey*, poplar: platform.mk: Fix typo in variable assignments
Signed-off-by: Victor Chong <victor.chong@linaro.org>
2018-02-08 02:14:46 +09:00
davidcunado-arm 9fd2f13bd6
Merge pull request #1224 from masahir0y/gzip
Support GZIP-compressed images for faster loading and verification
2018-02-06 05:12:28 +00:00
Masahiro Yamada 33950dd8fe Build: change the first parameter of TOOL_ADD_IMG to lowercase
In the next commit, I need the image name in lowercase because
output files are generally named in lowercase.

Unfortunately, TOOL_ADD_IMG takes the first argument in uppercase
since we generally use uppercase Make variables.

make_helpers/build_macros.mk provides 'uppercase' macro to convert
a string into uppercase, but 'lowercase' does not exist.  We can
implement it if we like, but it would be more straightforward to
change the argument of TOOL_ADD_IMG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-01 20:39:38 +09:00
Masahiro Yamada c939d13a8c Build: rename FIP_ADD_IMG to TOOL_ADD_IMG
Now FIP_ADD_IMG takes care of both fiptool and cert_create
symmetrically.  Rename it so that it matches the behavior.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-01 20:20:03 +09:00
Haojian Zhuang cde9f4f41f hikey: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in
DRAM, it's overlapped with MAP_DDR.

Since MAP_OPTEE_PAGEABLE isn't used in SRAM case, just remove it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-01-30 09:06:23 +08:00
Dimitris Papastamos 383c808999 Disable workaround for CVE-2017-5715 on unaffected platforms
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-01-29 09:58:56 +00:00
Victor Chong d5d5595ab1 hikey: fix assert in sec_protect()
`assert(e)` was used in place of `if (e) ERROR()` when sec_protect()
was ported from hikey fork so the logic should have been reversed.

Fixes: 3d5d9f5a ("hikey: configure the top 16MB of DRAM as secure")
Fixes: 52988b38 ("hikey: configure 4 MB of secure DRAM for OP-TEE
Secure Data Path")
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Victor Chong <victor.chong@linaro.org>
2018-01-28 00:07:07 +09:00
davidcunado-arm 5df277800f
Merge pull request #1205 from petegriffin/hikey-protect-memory
Hikey protect optee / sdp memory
2018-01-26 17:29:36 +00:00
Peter Griffin 52988b38c0 hikey: configure 4 MB of secure DRAM for OP-TEE Secure Data Path
Update the memory firewall configuration to reserve 4 MB of secure RAM
for use by the kernel and OP-TEE as the Secure Data Path pool.
Note that this address range (0x3E800000 - 0x3EC00000) falls in the
range already set aside by UEFI (which reserves the upper 32 MB of the
1GB DRAM for OP-TEE [1]) and was previously unused.

[1] https://github.com/96boards-hikey/edk2/blob/hikey/HisiPkg/HiKeyPkg/Library/HiKeyLib/HiKeyMem.c#L44
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Victor Chong <victor.chong@linaro.org>
2018-01-24 03:30:23 +00:00
Jerome Forissier 3d5d9f5aa8 hikey: configure the top 16MB of DRAM as secure
DRAM region 0x3f000000 - 0x3fffffff is reserved for OP-TEE and should
therefore be accessible only from secure world.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Victor Chong <victor.chong@linaro.org>
2018-01-24 03:30:23 +00:00
davidcunado-arm c14d3dcd47
Merge pull request #1167 from Leo-Yan/hikey-fix-alignment
Set alignment size to 512B for Hikey/Hikey960
2018-01-09 08:58:41 +00:00
David Cunado 3872fc2d1f Do not enable SVE on pre-v8.2 platforms
Pre-v8.2 platforms such as the Juno platform does not have
the Scalable Vector Extensions implemented and so the build
option ENABLE_SVE is set to zero.

This has a minor performance improvement with no functional
impact.

Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1
Signed-off-by: David Cunado <david.cunado@arm.com>
2017-11-30 17:45:23 +00:00
Leo Yan 591ff981c6 hikey: Set alignment size 512B for fip building
Set alignment size to 512B so finally we can get fip.bin with 512B
alignment. This can avoid stuck issue for 'fastboot' downloading if
USB driver uses DMA for data transferring.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
2017-11-22 17:11:22 +08:00
Roberto Vargas e8a87acd4b Fix usage of IMAGE_BLx macros
These macros are only defined for corresponding image,
and they are undefined for other images. It means that we have
to use ifdef or defined() instead of relying on being 0 by default.

Change-Id: Iad11efab9830ddf471599b46286e1c56581ef5a7
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2017-11-01 08:28:04 +00:00
Haojian Zhuang 454748fc86 HiKey: make RTC out of reset mode
Make RTC out of reset mode since it may be used in UEFI.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2017-10-18 20:02:12 +08:00
Haojian Zhuang f715bfdd6c HiKey: init EDMA controller with non secure mode
Init EDMA controller with non secure mode. A lot of peripherals are
depend on EDMA controller. But EDMA controller is in secure mode
by default. And this operation has to be executed in secure mode.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2017-10-18 20:02:12 +08:00
davidcunado-arm 1cde9b94fa Merge pull request #1089 from Leo-Yan/hikey_enable_debug_module
Hikey: enable CPU debug module
2017-09-15 11:29:03 +01:00
Victor Chong fe116c65f5 hikey*: Undef BL32_BASE when building without SPD
Otherwise, BL2 tries to load a BL32 image and triggers
assert(result == 0)
in
plat_get_image_source()
in hikey{960}_io_storage.c
in a debug build, or displays
ERROR:   BL2: Failed to load image
in a release build.

Signed-off-by: Victor Chong <victor.chong@linaro.org>
2017-09-14 01:27:19 +09:00
Victor Chong 5ad0de14e9 hikey*: Fix typo
Signed-off-by: Victor Chong <victor.chong@linaro.org>
2017-09-14 01:24:19 +09:00
Leo Yan e246617b41 Hikey: enable CPU debug module
Every CPU has its own debug module and this module is used by JTAG
debugging and coresight tracing. If without enabling it, it's easily to
introduce lockup issue when we enable debugging features.

This patch is to enable CPU debug module when power on CPU; this allows
connecting to all cores through JTAG and used by kernel coresight
driver.

Signed-off-by: Matthias Welwarsky <maw@sysgo.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
2017-09-07 16:57:31 +08:00
Victor Chong b16bb16e3b hikey*: Support Trusted OS extra image (OP-TEE header) parsing
Signed-off-by: Victor Chong <victor.chong@linaro.org>
2017-09-01 22:48:10 +09:00
Victor Chong 2de0c5cc4f hikey*: Add LOAD_IMAGE_V2 support
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
2017-09-01 22:47:50 +09:00
danh-arm 137c8f01e4 Merge pull request #1069 from Leo-Yan/hikey_enable_watchdog_reset
Hikey: enable watchdog reset
2017-08-31 09:37:47 +01:00
Eleanor Bonnici f9a856ba9f HiKey: Rename CPUACTRL reg constants
Constants named as *ACTLR* refer in fact to the CPUACTRL_EL1 register.
Since ACTLR and ACTRL_EL1 are different registers this patch renames
these constants for clarity.

Change-Id: I2a9e402dab7b0fcb6e481ee0d8a11eda943ed299
Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>
2017-08-29 13:52:48 +01:00
Leo Yan 3506ff110c Hikey: enable watchdog reset
At the system boot time we need enable watchdog reset, otherwise after
the watchdog is timeout it cannot reset the SoC. We need set the bit 0
and bit 16 together, the bit 16 is mask bit so after set bit 16 we have
permission to operate bit 0 and bit 0 is watchdog reset enabling bit.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
2017-08-29 14:38:06 +08:00
Julius Werner 64726e6d61 Add new alignment parameter to func assembler macro
Assembler programmers are used to being able to define functions with a
specific aligment with a pattern like this:

    .align X
  myfunction:

However, this pattern is subtly broken when instead of a direct label
like 'myfunction:', you use the 'func myfunction' macro that's standard
in Trusted Firmware. Since the func macro declares a new section for the
function, the .align directive written above it actually applies to the
*previous* section in the assembly file, and the function it was
supposed to apply to is linked with default alignment.

An extreme case can be seen in Rockchip's plat_helpers.S which contains
this code:

  [...]
  endfunc plat_crash_console_putc

  .align 16
  func platform_cpu_warmboot
  [...]

This assembles into the following plat_helpers.o:

  Sections:
  Idx Name                             Size  [...]  Algn
   9 .text.plat_crash_console_putc 00010000  [...]  2**16
  10 .text.platform_cpu_warmboot   00000080  [...]  2**3

As can be seen, the *previous* function actually got the alignment
constraint, and it is also 64KB big even though it contains only two
instructions, because the .align directive at the end of its section
forces the assembler to insert a giant sled of NOPs. The function we
actually wanted to align has the default constraint. This code only
works at all because the linker just happens to put the two functions
right behind each other when linking the final image, and since the end
of plat_crash_console_putc is aligned the start of platform_cpu_warmboot
will also be. But it still wastes almost 64KB of image space
unnecessarily, and it will break under certain circumstances (e.g. if
the plat_crash_console_putc function becomes unused and its section gets
garbage-collected out).

There's no real way to fix this with the existing func macro. Code like

 func myfunc
 .align X

happens to do the right thing, but is still not really correct code
(because the function label is inserted before the .align directive, so
the assembler is technically allowed to insert padding at the beginning
of the function which would then get executed as instructions if the
function was called). Therefore, this patch adds a new parameter with a
default value to the func macro that allows overriding its alignment.

Also fix up all existing instances of this dangerous antipattern.

Change-Id: I5696a07e2fde896f21e0e83644c95b7b6ac79a10
Signed-off-by: Julius Werner <jwerner@chromium.org>
2017-08-15 16:37:08 -07:00
Leo Yan c9e8774cb8 hikey: Disable VBUS_DET interrupt for PMIC
After disconnect Jumper pin 1-2 in J15 header, the signal VBUS_DET is to
be pulled down to low level. This will assert the interrupt signal in
PMIC and trigger IRQ in GIC; the asserted signal from VBUS_DET is level
triggered and kernel reports the warning for unhooked interrupt handling;
and VBUS_DET stays with low level, this triggers IRQ storm in kernel.

This patch is to disable interrupt for VBUS_DET in PMIC, this can
dismiss the verbose log and IRQ storm after kernel booting.

[   40.835279] irq 57: nobody cared (try booting with the "irqpoll" option)
[   40.842075] CPU: 0 PID: 980 Comm: irq/57-hi655x-p Not tainted 4.4.77-568944-g576a0114dec8-dirty #667
[   40.851303] Hardware name: HiKey Development Board (DT)
[   40.856580] Call trace:
[   40.859060] [<ffffff800808c4cc>] dump_backtrace+0x0/0x1e0
[   40.864516] [<ffffff800808c8ac>] show_stack+0x20/0x28
[   40.869622] [<ffffff80084b9688>] dump_stack+0xa8/0xe0
[   40.874729] [<ffffff800812dd5c>] __report_bad_irq+0x40/0xec
[   40.880360] [<ffffff800812e0bc>] note_interrupt+0x1e4/0x2d8
[   40.885992] [<ffffff800812b11c>] handle_irq_event_percpu+0xd8/0x268
[   40.892324] [<ffffff800812b2f8>] handle_irq_event+0x4c/0x7c
[   40.897955] [<ffffff800812ecbc>] handle_level_irq+0xcc/0x178
[   40.903672] [<ffffff800812a778>] generic_handle_irq+0x34/0x4c
[   40.909481] [<ffffff80085074c8>] pl061_irq_handler+0xa8/0x124
[   40.915286] [<ffffff800812a778>] generic_handle_irq+0x34/0x4c
[   40.921092] [<ffffff800812a820>] __handle_domain_irq+0x90/0xf8
[   40.926985] [<ffffff8008082620>] gic_handle_irq+0x58/0xa8

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
2017-07-26 14:47:57 +08:00
davidcunado-arm aa965e1583 Merge pull request #1029 from islmit01/im/fix_includes
Fix order of includes
2017-07-20 22:01:00 +01:00
Isla Mitchell ee1ebbd18e Fix order of remaining platform #includes
This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupings and where there are headers within #if statements.

Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
2017-07-14 10:50:41 +01:00
Victor Chong 3b6e88a2b3 hikey: Add BL32 (OP-TEE) support
Signed-off-by: Victor Chong <victor.chong@linaro.org>
2017-07-12 18:23:26 +09:00
Victor Chong c0cde3640a hikey: Remove unnecessary code
PLATFORM_LINKER_FORMAT
and
PLATFORM_LINKER_ARCH
defines are removed from
plat/hisilicon/hikey/include/platform_def.h
since there are already defined in
include/plat/common/common_def.h
which is included by
plat/hisilicon/hikey/hikey_def.h
which is included by
plat/hisilicon/hikey/include/platform_def.h

The line
$(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw))
is removed from
plat/hisilicon/hikey/platform.mk
to clear the warning below:

Makefile:544: warning: overriding commands for target `check_SCP_BL2'
plat/hisilicon/hikey/platform.mk:19: warning: ignoring old commands for target `check_SCP_BL2'

$(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw))
already exists in
Makefile
and applies to plat hikey so is redundant in
plat/hisilicon/hikey/platform.mk

Signed-off-by: Victor Chong <victor.chong@linaro.org>
2017-07-12 17:27:44 +09:00
Victor Chong 5c0c20ce31 hikey: Fix DDR_SIZE
Signed-off-by: Victor Chong <victor.chong@linaro.org>
2017-07-12 16:28:09 +09:00