Commit Graph

147 Commits

Author SHA1 Message Date
Nicolas Le Bayon 63d2159846 refactor(st-ddr): move basic tests in a dedicated file
These basic tests are generic and should be used independently of the
driver, depending on the plaftorm characteristics.

Change-Id: I38161b659ef2a23fd30a56e1c9b1bd98461a2fe4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
2022-01-05 11:47:46 +01:00
Nicolas Le Bayon 06e55dc842 refactor(st-ddr): reorganize generic and specific elements
stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32mp_ddr_size moves to the generic side.
stm32mp1_ddr_priv contains platform private data.

stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to
retrieve data from DT. They are located in new generic c/h files in
which stm32mp_ddr_param structure is declared. Platform makefile
is updated.

Adapt driver with this new classification.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I4187376c9fff1a30e7a94407d188391547107997
2022-01-05 11:09:59 +01:00
Yann Gautier 88f4fb8fa7 feat(stm32mp1): allow configuration of DDR AXI ports number
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.

Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-05 11:09:59 +01:00
Yann Gautier ba7d2e2698 refactor(st-ddr): update parameter array initialization
Force alignment of the size of parameters array with the expected
value by the binding.
The registers dynamic structs are removed as not used in TF-A.

Change-Id: I7a41f355a435f54fbf23f468cca87c7f8f7e69e8
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-05 11:09:59 +01:00
Nicolas Le Bayon 5def13eb01 feat(st-ddr): add read valid training support
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I7ac1c77c21ebc30315b532741f2f255c2312d5b2
2022-01-05 11:09:59 +01:00
Patrick Delaunay 26cf5cf6d6 refactor(stm32mp1): remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by CubeMX.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional "st,phy-cal"

After this patch the built-in calibration is always executed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I3fc445520c259f7f05730aefc25e64b328bf7159
2022-01-05 11:09:59 +01:00
Yann Gautier a078134e23 fix(st-ddr): correct DDR warnings
Replace %d with %u in logs, to avoid warning when
-Wformat-signedness is enabled.
And correct the order of includes.

Change-Id: I7c711a37fc1deceb8853831a8a09ae50422859c9
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2022-01-05 09:19:05 +01:00
Yann Gautier d50e7a71cb fix(st-sdmmc2): check regulator enable/disable return
The issue was reported by Coverity [1]. The return of the functions
regulator_disable() and regulator_enable() was not checked.
If they fail, this means there is an issue either with PMIC or I2C.
The board should the stop booting with a panic().

[1] https://scan4.scan.coverity.com/reports.htm#v47771/p11439/mergedDefectId=374565

Change-Id: If5dfd5643c210e03ae4b1f4cab0168c0db89f60e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-04 15:25:04 +01:00
Madhukar Pappireddy 93b153b5bf Merge changes from topic "st_regulator" into integration
* changes:
  feat(st-sdmmc2): manage cards power cycle
  feat(stm32mp1): register fixed regulator
  feat(st-drivers): introduce fixed regulator driver
  refactor(st): update CPU and VDD voltage get
  refactor(stm32mp1-fdts): update regulator description
  refactor(st-pmic): use regulator framework for DDR init
  feat(st-pmic): register the PMIC to regulator framework
  refactor(st-pmic): split initialize_pmic()
  feat(stm32mp1): add regulator framework compilation
  feat(regulator): add a regulator framework
  feat(stpmic1): add new services
  feat(stpmic1): add USB OTG regulators
  refactor(st-pmic): improve driver usage
  refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
  refactor(stm32mp1): re-order drivers init
2021-12-24 00:13:50 +01:00
Yann Gautier 258bef913a feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required.
For this we need to:
- disable vmmc-supply regulator
- make the power cycle required for SDMMC2 peripheral
- enable regulators

Change-Id: I2be6d9082d1cc4c864a82cf2c31ff8522e2d31a2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-22 14:04:32 +01:00
Pascal Paillet 5d6a2646f7 feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available

Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474
Signed-off-by: Pascal Paillet <p.paillet@st.com>
2021-12-22 14:04:32 +01:00
Pascal Paillet 0ba71ac901 refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.

Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier 85fb175b5e feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.

Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Nicolas Le Bayon ae7792e058 refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after initialize_pmic() in BL2.

Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-12-22 14:04:32 +01:00
Pascal Paillet d5b4a2c4e7 feat(regulator): add a regulator framework
Add a regulator framework to:
- provide an interface to consumers and drivers,
- connect consumers with drivers,
- handle most of devicetree-parsing,
- handle always-on and boot-on regulators,
- handle min/max voltages,

Change-Id: I23c939fdef2c71a416c44c9de332f70db0d2aa53
Signed-off-by: Pascal Paillet <p.paillet@st.com>
2021-12-22 14:04:32 +01:00
Pascal Paillet ea552bf5a5 feat(stpmic1): add new services
Add support for ICC, sink mode, bypass mode,
active discharge and list voltages.
Handle LDO3 sink source mode in a different way to avoid
setting voltage while in sink source mode.

Change-Id: Ib1b909fd8a153f542917f650e43e24317a570534
Signed-off-by: Pascal Paillet <p.paillet@st.com>
2021-12-22 14:04:32 +01:00
Etienne Carriere 13fbfe046e feat(stpmic1): add USB OTG regulators
Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to
USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are
needed since manipulated during the suspend/resume power sequence
as per FDT description for stm32mp15x-xxx boards from
STMicroelectronics.

Change-Id: I6217de707e49882bd5a9100db43e0d354908800d
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2021-12-22 14:04:32 +01:00
Nicolas Le Bayon c77c7d9e30 refactor(st-pmic): improve driver usage
Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in dt_get_pmic_node() as local static variables.

Change-Id: I4585e9dfdde2847a369bffcc6f2b39ecc2b74de1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-12-22 14:04:32 +01:00
Nicolas Le Bayon 16e56a75de refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier 33667d299b feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2021-12-22 13:08:09 +01:00
Yann Gautier 737ad29bf9 feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
2021-12-14 09:25:19 +01:00
Manish Pandey be1d8b24f5 Merge "feat(stm32mp1): preserve the PLL4 settings for USB boot" into integration 2021-12-10 14:19:15 +01:00
Nicolas Le Bayon 165ad5561e feat(drivers/st/uart): add uart driver for STM32MP1
Add a UART/USART driver for STM32 with complete a hardware support;
it used for STM32CubeProgrammer support with even parity.

This driver is not used for console, which is already handle
by a simple driver (drivers/st/uart/aarch32/stm32_console.S).

Change-Id: Ia9266e5d177fe7fd09c8a15b81da1a05b1bc8b2d
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-12-03 09:26:11 +01:00
Patrick Delaunay bf1af154db feat(stm32mp1): preserve the PLL4 settings for USB boot
The PLL4 can be used by ROM code as the source clock of USB PHYC and,
in this case, the PLL4 configuration must be preserved
with pll4_preserve to avoid USB disturbance.

This patch also adds an error when the clock tree PLL4 configuration
is not the PLL4 configuration used by ROM code; this error allows to
detect a invalid clock tree.

This commit corrects the coverity issue 343023.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I4bae9312a2db8dd342a38e649513d689b13976bb
2021-12-03 09:19:53 +01:00
Manish Pandey 4ef449c15a fix: use correct printf format for uint64_t
sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic6811cc1788c698adde0807e5f8ab5290a900a26
2021-11-12 13:02:02 +00:00
Patrick Delaunay 9a138eb5f2 feat(drivers/st/usb): add device driver for STM32MP1
Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I90b21f094f6637b85f3ace23a3a3a2f6fd4e0951
2021-10-29 16:43:43 +02:00
Mark Dykes 3deb060015 Merge changes from topic "st_dt_match_instance" into integration
* changes:
  refactor(stm32_sdmmc2): use DT helpers
  feat(plat/st): create new helper for DT access
2021-10-15 20:53:01 +02:00
Pascal Paillet 0161991184 fix(stpmic1): fix power switches activation
Add enable bit mask description because power switches
are not all enabled by bit 0.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: If7c9ae7d800adee8e25416ca35db1be20452741f
2021-10-06 11:09:21 +02:00
Yann Gautier ed6a852346 fix(stpmic1): update error cases return
Use errno values, or the return of called functions, instead of -1.
Correct some MISRA issues, like braces.

Change-Id: If7b53de5cbfb4d2c9979bce0e594dd92bf07a77a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 11:09:21 +02:00
HE Shushan 5b111c7479 fix(stm32mp1_clk): keep RTC clock always on
On battery powered systems the RTC keeps the date/time across
system reboot.
The RTC clock should not be disabled otherwise the date/time
counter gets stopped.

Tag RTC clock as always on.

Signed-off-by: HE Shushan <shushan.he@st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I6455c3c740d2e5add28255eb84f8ebaf2870d9d8
2021-10-06 11:01:36 +02:00
Yann Gautier bff9e3ccc2 refactor(stm32_sdmmc2): use DT helpers
Use dt_match_instance_by_compatible() and dt_fill_device_info()
functions to simplify SDMMC driver code.

Change-Id: Id16aa849ac79a9d3c2dc72c947fe189743856292
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-10-06 10:58:39 +02:00
Yann Gautier bf39318d93 fix(stm32mp1_clk): set other clocks as always on
AXI, MPU and MCU clocks are always on, put them in the list
in the function clock_is_always_on().

Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3b1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 10:53:33 +02:00
Gabriel Fernandez 602ae2f23c fix(stm32mp1_clk): fix MPU clock rate
MPUDIV dividers are stored in a constant array, under bit shifts form.
They must be used in this way by the clock driver.

Change-Id: If758f7a4048eff956067a10a42ab0983a20a000d
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-10-06 10:53:33 +02:00
Etienne Carriere b8fe48b6f2 fix(stm32mp1_clk): fix MCU/AXI parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived
from clock  PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is derived
from clock  PLL2_P, not PLL2.

This change also renames MCU clock and AXI clock resources to
prevent confusion.

Change-Id: If55618d180e7dce8e4f0977b0e586a6fa8ef28d1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2021-10-06 10:53:33 +02:00
Yann Gautier ba57711c38 refactor(stm32mp_clk): keep RCC node offset
To avoid parsing device tree file too often, keep the RCC node
offset value in a variable in fdt_get_rcc_node().

Change-Id: Ibb23ff92247d57c65a23517b8f3473f639794d2a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 10:53:33 +02:00
Manish Pandey 7feb435060 Merge "refactor(drivers/st/clk): change fdt_get_rcc_node as static" into integration 2021-10-04 14:15:41 +02:00
Patrick Delaunay ff18c4cde4 refactor(drivers/st/clk): change fdt_get_rcc_node as static
Change the fdt_get_rcc_node function to static, as it is used only in
stm32mp_clkfunc.c file; it is only a cleanup change without functional
modification.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ib4ef110f6f1b16dbaa727a065e40275d3cf58a73
2021-09-22 15:39:12 +02:00
Yann Gautier 49c7f0cef4 fix(stm32_console): do not skip init for crash console
In BL32, only skip UART initialization if UART enable bit is set.
Due to patch [1], a reset of UART is done in crash console init.
In this case, UART should then be reconfigured.

[1] 7fa2e96e1 ("stm32mp1: add UART reset in crash console init")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I650d4c387b60dd74b780e6f3adfd629ea44f5834
2021-09-20 13:57:10 +02:00
Yann Gautier 288f5cf204 refactor(stm32mp1_clk): update RCC registers file
The file is first generated with the peripheral spirit XML file.
And then we add some common definition, to ease driver development.

Change-Id: I4c222cf006caf27cda6da044eaf184ce66bb1442
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-17 15:39:32 +02:00
Lionel Debieve 373f06be4e fix(stm32mp1_clk): keep RTCAPB clock always on
Further information such as boot instance are sent over backup
registers. In order to guarantee direct access to backup registers
in uboot, we will keep the RTC clock enabled.

Change-Id: I16572d422bfebbf39190a87db8046df486ce91c8
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-09-17 15:39:32 +02:00
Gabriel Fernandez cbd2e8a6af fix(stm32mp1_clk): fix RTC clock rating
When RTC clock source is HSE, the RTCDIV is not taken into account.

Change-Id: I1613b638e8932c03f3349adb01e13f5294a3bf5d
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-17 15:39:32 +02:00
Yann Gautier 15509093f0 fix(stm32mp1_clk): correctly manage RTC clock source
The clksrc value contains the RCC register address and the clock
source number. When applying the clock source, we should filter out
the RCC register address from the given value.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4345b03de7b9afd1df78df4131431cf1eb43ec17
2021-09-17 15:39:32 +02:00
Nicolas Le Bayon a4bcfe94e7 fix(drivers/st/pmic): missing error check
In pmic_operate(), "regulators" node value must be checked before
entering in the fdt_for_each_subnode loop.

Change-Id: I1460cd24ec56ec47ab644f396b71b92973e75fb4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Benjamin Gaignard 42822844bf fix(drivers/st/pmic): initialize i2c_state
Make sure that i2c->i2c_state is correctly initialized
with I2C_STATE_RESET value this avoid hi2c->lock to not
be set to 0 when calling stm32_i2c_init during platform
suspend/resume operations.

Change-Id: I3b4c1f9115589325eb256789a1764c322741db7d
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Yann Gautier 8f97c4fab1 fix(drivers/st/clk): use correct return value
The function stm32mp1_clk_init() returns an int. Return a negative
error value if the device tree is not found.

Change-Id: I422d5fea46c4d63d55a5b62e1db154c1f53f41b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Madhukar Pappireddy 7cfe5999be Merge changes from topic "io_stm32image" into integration
* changes:
  fix(io_stm32image): invalidate cache on local buf
  refactor(io_stm32image): add header size variable
  fix(io_stm32image): uninitialized variable warning
2021-06-18 15:40:20 +02:00
Yann Gautier a5bcf82402 fix(io_stm32image): invalidate cache on local buf
When retrieving data from stm32 image file, the header is removed with
a memcpy that shifts the data to overwrite the useless header for next
binary.

STM32 binary from boot device:
|-------------------------------------|
| header | payload                    |
|-------------------------------------|

After the memcpy:
|-------------------------------------|
| payload                    | remain |
|-------------------------------------|

But the remaining data after the shifted payload is still in
the cache. As it is of no use for anyone, just invalidate the cache
at this address.
This is required if the DDR is mapped secure in BL2, and the secure
access is forbidden in BL33, or else TZC-400 issues an error.

Change-Id: Ice2af3b1ca49eccb79bfc62db60437e259d344ca
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-04 15:15:18 +02:00
Yann Gautier b6561c1217 refactor(io_stm32image): add header size variable
A variable hdr_sz is created in stm32image_partition_read() function.
It just represents the size of the stm32 image header but it really
improves the readability of the function.

Change-Id: I95ec62a78a4b6c6a75b0d8c8aa0faef8bee424da
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-04 15:15:18 +02:00
Nicolas Le Bayon c1d732d0db fix(io_stm32image): uninitialized variable warning
Fixes implementation against build warning reported by GCC:

drivers/st/io/io_stm32image.c: In function ‘stm32image_partition_read’:
drivers/st/io/io_stm32image.c:249:6: error: ‘result’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
  int result;
      ^~~~~~

Actually, by construction the current implementation of function
stm32image_partition_read() does not mandate result to be initialized
since it always reaches the exit point with a valid value in 'result'.
Yet, this change prevents compiler from complaining and is more robust
against future changes in the implementation.

Change-Id: I383575edb605b7535398952a5fdfc266c0068c71
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-04 15:15:18 +02:00
Vyacheslav Yurkov f3d2750aa2 feat(drivers/st): manage boot part in io_mmc
Use dedicated read function for boot partition

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: If75df7691fce0797205365736fc6e4e3429efdca
2021-06-04 10:08:39 +02:00