Commit Graph

1209 Commits

Author SHA1 Message Date
Patrick Delaunay 7ca49284be fix(drivers/usb): remove deadcode when USBD_EP_NB = 1
CID 373791:  Control flow issues  (DEADCODE)
CID 373789:  Control flow issues  (DEADCODE)

Since USBD_EP_NB = 1 for DFU stack on STMP32MP15 platform (only EP0 is
required for DFU support) the value of num can't be different of 0
and the code can't be reached in usb_core_receive / usb_core_transmit.

Add a simple sub-function with this part of code.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I07a56909bb1e6de19ce52da7945b6d2916be8538
2021-11-04 09:49:30 +01:00
Patrick Delaunay 0cb9870ddf fix(drivers/usb): fix Null pointer dereferences in usb_core_set_config
Correct the invalid test on NULL pointer pdev->class in
usb_core_set_config function.

This patch fix the coverity errors:

  ** CID 373790:  Null pointer dereferences  (FORWARD_NULL)
  /drivers/usb/usb_device.c: 182 in usb_core_set_config()

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I83e43261bafa2d47f800e56df0b047a6c58a1e29
2021-11-04 09:48:44 +01:00
Patrick Delaunay 9a138eb5f2 feat(drivers/st/usb): add device driver for STM32MP1
Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I90b21f094f6637b85f3ace23a3a3a2f6fd4e0951
2021-10-29 16:43:43 +02:00
Patrick Delaunay 859bfd8d42 feat(drivers/usb): add a USB device stack
Add a new USB framework to manage an USB device profile (USBD)
based on a peripheral controller driver (PCD).

This USB stack can be use to implement any Universal Serial Bus Device
Class in TF-A on top of a USB driver defined in the platform.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I7971ec6d952edec3511157a198e6e5359df4346b
2021-10-29 16:43:28 +02:00
Sandrine Bailleux 292bb9a768 Merge "fix: remove "experimental" tag for stable features" into integration 2021-10-27 13:30:00 +02:00
Manish Pandey 700e7685dd fix: remove "experimental" tag for stable features
there are features which are marked as experimental even though they
are stable and used for quite some time.
Following features are no longer marked as experimental
  - SPMD
  - MEASURED_BOOT
  - FCONF and associated build flags
  - DECRYPTION_SUPPORT and associated build flags
  - ENABLE_PAUTH
  - ENABLE_BTI
  - USE_SPINLOCK_CAS
  - GICv3 Multichip support

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I4bb653d9c413c66095ec31f0b8aefeb13ea04ee9
2021-10-22 10:49:20 +01:00
Madhukar Pappireddy 0172ac30ff Merge "fix(scmi): mention "SCMI" in driver initialisation message" into integration 2021-10-21 21:11:12 +02:00
Manish Pandey cc808acb9d Merge "fix(cc-713): fix a build failure with CC-713 library" into integration 2021-10-19 14:34:09 +02:00
Andre Przywara e0baae7316 fix(scmi): mention "SCMI" in driver initialisation message
Currently the SCMI driver reports:
INFO:    Initializing driver on Channel 0
on the console, which is not very specific (which driver?).

Add "SCMI" to the message so the user knows what the firmware is trying
to initialise.

Change-Id: Id8202655d07b8e12fe07670d462c6202e6eae2f0
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-19 10:58:32 +02:00
Manish Pandey a06f2f4355 Merge changes from topic "ufs_patches" into integration
* changes:
  fix(ufs): add reset before DME_LINKSTARTUP
  refactor(ufs): add retry logic to ufshc_reset
  refactor(ufs): reuse ufshc_send_uic_cmd
2021-10-18 14:13:17 +02:00
Joanna Farley bf63dc56b0 Merge changes I684d54a7,I61339fc5,Ic0dabf3e,Ief09a841 into integration
* changes:
  feat(plat/rcar): change process for Suspend To RAM
  fix(plat/rcar): change process that copy code to system ram
  fix(plat/rcar): fix cache maintenance process of reading cert header
  fix(plat/rcar): fix to load image when option BL2_DCACHE_ENABLE is enabled
2021-10-18 10:14:07 +02:00
Joanna Farley 381d685021 Merge changes Id7d4f5df,If82542cc,I0ba80057,I75a443db,Ifa18b4fc, ... into integration
* changes:
  feat(nxp/common/ocram): add driver for OCRAM initialization
  feat(plat/nxp/common): add EESR register definition
  fix(plat/nxp/ls1028a): fix compile error when enable fuse provision
  fix(drivers/nxp/sfp): fix compile warning
  fix(plat/nxp/ls1028a): define endianness of scfg and gpio
  fix(nxp/scfg): fix endianness checking
2021-10-18 09:54:28 +02:00
Toshiyuki Ogasahara 49593cc1ce fix(plat/rcar): change process that copy code to system ram
Change processing of invalidate instruction cache to after changing
the RAM attribute.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # squash with rcar_gen3: drivers: Disable data cache while Suspend To RAM
Change-Id: I61339fc5415b26074b1e0753da4c4a432e8f83d9
2021-10-16 17:41:49 +02:00
Toshiyuki Ogasahara c77ab18ec7 fix(plat/rcar): fix cache maintenance process of reading cert header
Move calling inv_dcache_range from before io_read to after that.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ic0dabf3eb94eeeb04099ed5127cdfda79bbac9b3
2021-10-16 17:41:49 +02:00
Toshiyuki Ogasahara d2ece8dba2 fix(plat/rcar): fix to load image when option BL2_DCACHE_ENABLE is enabled
- Modify load destination variable of the Cert Header to static.
- Modify the return value to error (IO_FAIL) when failed to check
  the Cert Header.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ief09a841ec8d2ae236de82d04855e6a47cfb43f0
2021-10-16 17:41:34 +02:00
Jorge Troncoso 905635d5e7 fix(ufs): add reset before DME_LINKSTARTUP
This change aims to make the UFS code more robust by performing a
controller reset if linkstartup fails. This idea was borrowed from
Linux's ufshcd_link_startup function.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I6b52148d1bf155b11198dc82a39b1120057adaaf
2021-10-15 13:22:49 -07:00
Jorge Troncoso 99ff1a35fe refactor(ufs): add retry logic to ufshc_reset
This change aims to make the UFS code more robust by adding retry logic
and timeouts to ufshc_reset. We also define a new function
ufshc_hce_enable for Host Controller Enable (HCE). The inner and outer
retry pattern is based on Linux's ufshcd_hba_execute_hce function.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I9403a5a25d3ca50af5f2f9a65b774f6a2d7a9626
2021-10-15 13:22:49 -07:00
Jorge Troncoso d68d163dd7 refactor(ufs): reuse ufshc_send_uic_cmd
This change aims to make the UFS code more robust by removing asserts
and adding retry logic. We also reduce repetition by reusing
ufshc_send_uic_cmd for DME_GET and DME_SET commands.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: Id70aa1687d5ca78dc7d47234372255ac5a04a612
2021-10-15 13:22:49 -07:00
Mark Dykes 3deb060015 Merge changes from topic "st_dt_match_instance" into integration
* changes:
  refactor(stm32_sdmmc2): use DT helpers
  feat(plat/st): create new helper for DT access
2021-10-15 20:53:01 +02:00
Manish V Badarkhe e5fbee5085 fix(cc-713): fix a build failure with CC-713 library
Fixed a below build failure with CC-713 library
error:
implicit declaration of function ‘mbedtls_x509_get_rsassa_pss_params’
[-Werror=implicit-function-declaration]

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: If298ec16d133cf54413c299327b2c007ec4117b2
2021-10-15 12:30:06 +02:00
Mark Dykes 7b97cf378a Merge changes from topic "st_fixes" into integration
* changes:
  fix(stpmic1): fix power switches activation
  fix(stpmic1): update error cases return
  refactor(stpmic1): use BIT and GENMASK helpers
  fix(stm32mp1_clk): keep RTC clock always on
  fix(stm32mp1_clk): set other clocks as always on
2021-10-14 23:16:36 +02:00
Mark Dykes 115901bc2d Merge "fix(stm32mp1_clk): fix MPU clock rate" into integration 2021-10-14 22:56:25 +02:00
Mark Dykes d20d5002f9 Merge "fix(stm32mp1_clk): fix MCU/AXI parent clock" into integration 2021-10-14 22:56:15 +02:00
Mark Dykes 34ddd83bc8 Merge "refactor(stm32mp_clk): keep RCC node offset" into integration 2021-10-14 22:55:48 +02:00
Manish Pandey 68d8d3e7af Merge "fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe" into integration 2021-10-14 18:03:28 +02:00
Manish V Badarkhe 48ba0345f7 feat(measured_boot): image hash measurement and recording in BL1
It looks safer and cleaner approach to record the measurement taken by
BL1 straightaway in TCG Event Log instead of deferring these recordings
to BL2.
Hence pull in the full-fledged measured boot driver into BL1 that
replaces the former ad-hoc platform interfaces i.e.
bl1_plat_set_bl2_hash, bl2_plat_get_hash.

As a result of this change the BL1 of Arm FVP platform now do the
measurements and recordings of below images:
1. FW_CONFIG
2. TB_FW_CONFIG
3. BL2

Change-Id: I798c20336308b5e91b547da4f8ed57c24d490731
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe efa6521878 refactor(measured boot): remove platform calls from Event Log driver
Currently, the Event Log driver does platform layer work by invoking
a few platform functions in the 'event_log_finalise' call. Doing
platform work does not seem to be the driver's responsibility, hence
moved 'event_log_finalise' function's implementation to the platform
layer.

Alongside, introduced few Event Log driver functions and done
some cosmetic changes.

Change-Id: I486160e17e5b0677c734fd202af7ccd85476a551
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 8cd09cfc91 refactor(measured boot): move BL2 measurement to platform layer
Right now, event_log_init() does 2 things:
1) It writes all the necessary TCG data structures in the event log buffer.
2) It writes the first measurement (BL2's).

Step 2) introduces in the TCG event log driver an assumption on what
is getting measured and in what order. Ideally, the driver should only
be concerned about generic operations, such as initializing the event
log or recording a measurement in it. As much as possible, we should
design the driver such that it could be reused in another project that
has a different measure boot flow.

For these reasons, move step 2) up to the caller, plat_mboot_init() in
this case. Make event_log_record() a public function for this purpose.

This refactoring will also help when we make BL1 record BL2's
measurement into the event log (instead of BL2). Both BL1 and BL2 will
need to call the driver's init function but only BL1 will need
recording BL2's measurement. We can handle this through different
implementations of plat_mboot_init() for BL1 and BL2, leaving the TCG
event log driver unchanged.

Change-Id: I358e097c1eedb54f82b866548dfc6bcade83d519
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 9b0b344474 refactor(measured boot): rename add_event2()
To a layman in TCG linguo, add_event2() is not straight forward to
understand. Rename the function into event_log_record().

Change-Id: I75d53a656425cd78a41ebf2c4c4e4e57687adc0d
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux d89bec83dc build(measured boot): rename measured boot makefile
With the removal of the generic functions measured_boot_init()/finish(),
measured_boot.mk becomes specific to the TCG event log backend. Change
its file name to event_log.mk.
Also, the Event Log driver is one of the backend of measured boot hence
created a separate folder for it under the measured_boot directory.

Alongside done some cosmetic changes (adding a comment and fixing
identation).

Change-Id: I4ce3300e6958728dc15ca5cced09eaa01510606c
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Manish V Badarkhe 47bf3ac31e feat(measured boot): move init and teardown functions to platform layer
Right now, the measured boot driver is strongly coupled with the TCG
event log driver. It would not be possible to push the measurements
somewhere else, for instance to a physical TPM.

To enable this latter use case, turn the driver's init and teardown
functions into platform hooks. Call them bl2_plat_mboot_init()/finish().
This allows each platform to implement them appropriately, depending on
the type of measured boot backend they use. For example, on a platform
with a physical TPM, the plat_mboot_init() hook would startup the TPM
and setup it underlying bus (e.g. SPI).

Move the current implementation of the init and teardown function to the
FVP platform layer.

Finally move the conditional compilation logic (#if MEASURED_BOOT) out
of bl2_main() to improve its readability. Provide a dummy implementation
in the case measured boot is not included in the build.

Change-Id: Ib6474cb5a9c1e3d4a30c7f228431b22d1a6e85e3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 4a24707f94 refactor(measured boot): rename tpm_record_measurement()
tpm_record_measurement() function name suggests that:

 - It only records a measurement but does not compute it.
   This is not the case, the function does both.

 - It stores this measurement into a TPM (discrete chip or fTPM).
   This is not the case either, the measurement is just stored into
   the event log, which is a data structure hold in memory, there is
   no TPM involvement here.

To better convey the intent of the function, rename it into
event_log_measure_and_record().

Change-Id: I0102eeda477d6c6761151ac96759b31b6997e9fb
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Pali Rohár 0f3a122109 fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe
The mvebu_a3700_comphy_pcie_power_on() function does not configure the
PHY selector explicitly, it relies on the register default value.

Configure the PHY selector just in case someone changed the default
value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I54048b4bb7a5eced36f7fe6592ebe108f978fff0
2021-10-12 15:09:52 +02:00
Jiafei Pan 3239a17561 fix(drivers/nxp/sfp): fix compile warning
Fix compile warning that ‘mask’ may be used uninitialized.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I75a443dbc36d7bd174fe317616fd95cd096306fc
2021-10-09 10:57:29 +02:00
Pascal Paillet 0161991184 fix(stpmic1): fix power switches activation
Add enable bit mask description because power switches
are not all enabled by bit 0.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: If7c9ae7d800adee8e25416ca35db1be20452741f
2021-10-06 11:09:21 +02:00
Yann Gautier ed6a852346 fix(stpmic1): update error cases return
Use errno values, or the return of called functions, instead of -1.
Correct some MISRA issues, like braces.

Change-Id: If7b53de5cbfb4d2c9979bce0e594dd92bf07a77a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 11:09:21 +02:00
HE Shushan 5b111c7479 fix(stm32mp1_clk): keep RTC clock always on
On battery powered systems the RTC keeps the date/time across
system reboot.
The RTC clock should not be disabled otherwise the date/time
counter gets stopped.

Tag RTC clock as always on.

Signed-off-by: HE Shushan <shushan.he@st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I6455c3c740d2e5add28255eb84f8ebaf2870d9d8
2021-10-06 11:01:36 +02:00
Yann Gautier bff9e3ccc2 refactor(stm32_sdmmc2): use DT helpers
Use dt_match_instance_by_compatible() and dt_fill_device_info()
functions to simplify SDMMC driver code.

Change-Id: Id16aa849ac79a9d3c2dc72c947fe189743856292
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-10-06 10:58:39 +02:00
Gabriel Fernandez 602ae2f23c fix(stm32mp1_clk): fix MPU clock rate
MPUDIV dividers are stored in a constant array, under bit shifts form.
They must be used in this way by the clock driver.

Change-Id: If758f7a4048eff956067a10a42ab0983a20a000d
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-10-06 10:53:33 +02:00
Etienne Carriere b8fe48b6f2 fix(stm32mp1_clk): fix MCU/AXI parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived
from clock  PLL3_P, not PLL3.

Correct AXI clock parent selector: AXI subsystem clock is derived
from clock  PLL2_P, not PLL2.

This change also renames MCU clock and AXI clock resources to
prevent confusion.

Change-Id: If55618d180e7dce8e4f0977b0e586a6fa8ef28d1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2021-10-06 10:53:33 +02:00
Yann Gautier ba57711c38 refactor(stm32mp_clk): keep RCC node offset
To avoid parsing device tree file too often, keep the RCC node
offset value in a variable in fdt_get_rcc_node().

Change-Id: Ibb23ff92247d57c65a23517b8f3473f639794d2a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 10:53:33 +02:00
Yann Gautier bf39318d93 fix(stm32mp1_clk): set other clocks as always on
AXI, MPU and MCU clocks are always on, put them in the list
in the function clock_is_always_on().

Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3b1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 10:53:33 +02:00
Madhukar Pappireddy d7fe4cb036 Merge changes from topic "ethosn-multi-device" into integration
* changes:
  feat(drivers/arm/ethosn)!: multi-device support
  feat(fdt): add for_each_compatible_node macro
2021-10-05 22:15:40 +02:00
Manish Pandey a6db44ad16 Merge changes Ie7c0eaf2,I11d882f3,I3f173ac4,If1fa12bf,I3e3a202f, ... into integration
* changes:
  feat(plat/rcar3): keep RWDT enabled
  feat(drivers/rcar3): add extra offset if booting B-side
  feat(plat/rcar3): modify LifeC register setting for R-Car D3
  feat(plat/rcar3): modify SWDT counter setting for R-Car D3
  feat(plat/rcar3): update DDR setting for R-Car D3
  feat(plat/rcar3): remove access to RMSTPCRn registers in R-Car D3
  feat(plat/rcar3): add process of SSCG setting for R-Car D3
  feat(plat/rcar3): add process to back up X6 and X7 register's value
  feat(plat/rcar3): modify operation register from SYSCISR to SYSCISCR
  feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up
  feat(plat/rcar3): change the memory map for OP-TEE
  feat(plat/rcar3): use PRR cut to determine DRAM size on M3
  feat(plat/rcar3): apply ERRATA_A53_1530924 and ERRATA_A57_1319537
  fix(plat/rcar3): fix disabling MFIS write protection for R-Car D3
  fix(plat/rcar3): fix eMMC boot support for R-Car D3
  fix(plat/rcar3): fix version judgment for R-Car D3
  fix(plat/rcar3): fix source file to make about GICv2
  fix(drivers/rcar3): console: fix a return value of console_rcar_init
2021-10-05 16:50:23 +02:00
Manish Pandey 7feb435060 Merge "refactor(drivers/st/clk): change fdt_get_rcc_node as static" into integration 2021-10-04 14:15:41 +02:00
Manish Pandey 6acaba6238 Merge changes I16cac81b,I6c709c0c,I69581714,I018d158f,I23146f56, ... into integration
* changes:
  fix(drivers/marvell/comphy-cp110): fix error code in pcie power on
  fix(drivers/marvell/comphy-3700): handle failures in power functions
  fix(drivers/marvell/comphy-3700): fix address overflow
  refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init()
  refactor(drivers/marvell/comphy-3700): simplify usage of indirect access on lane2
  refactor(drivers/marvell/comphy-3700): simplify usage of sata power off
2021-10-04 10:54:55 +02:00
Laurent Carlier 1c65989e70 feat(drivers/arm/ethosn)!: multi-device support
Add support for Arm Ethos-N NPU multi-device.

The device tree parsing currently only supports one NPU device with
multiple cores. To be able to support multi-device NPU configurations
this patch adds support for having multiple NPU devices in the device
tree.

To be able to support multiple NPU devices in the SMC API, it has been
changed in an incompatible way so the API version has been bumped.

Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
Change-Id: Ide279ce949bd06e8939268b9601c267e45f3edc3
2021-10-01 09:27:11 +01:00
laurenw-arm e31fb0fa1b fvp_r: load, auth, and transfer from BL1 to BL33
Adding load, authentication, and transfer functionality from FVP R BL1 to
BL33, which will be the partner runtime code.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I293cad09739dacac0d20dd57c1d98178dbe84d40
2021-09-30 17:07:11 +01:00
Madhukar Pappireddy 890ee3e87a Merge changes from topic "st_fixes" into integration
* changes:
  fix(stm32_console): do not skip init for crash console
  fix(plat/st): add UART reset in crash console init
  refactor(stm32mp1_clk): update RCC registers file
  fix(stm32mp1_clk): keep RTCAPB clock always on
  fix(stm32mp1_clk): fix RTC clock rating
  fix(stm32mp1_clk): correctly manage RTC clock source
  fix(spi_nand): check correct manufacturer id
  fix(spi_nand): check that parameters have been set
2021-09-30 16:42:56 +02:00
Pali Rohár c0a909cdcc fix(drivers/marvell/comphy-cp110): fix error code in pcie power on
Function polling_with_timeout() returns last value from polled register
on failure and zero on success. So set "ret" variable to error code
-ETIMEDOUT on error like it is done in other functions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I16cac81bbcbe2113e139722dc0e8fc2b85428d1b
2021-09-29 22:25:46 +02:00