Commit Graph

2596 Commits

Author SHA1 Message Date
Usama Arif 00c7d5aca3 plat/arm: Introduce A5 DesignStart platform.
This patch adds support for Cortex-A5 FVP for the
DesignStart program. DesignStart aims at providing
low cost and fast access to Arm IP.

Currently with this patch only the primary CPU is booted
and the rest of them wait for an interrupt.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I3a2281ce6de2402dda4610a89939ed53aa045fab
2019-07-16 14:13:12 +00:00
Soby Mathew d0d0f17164 Merge changes from topic "jc/shift-overflow" into integration
* changes:
  Enable -Wshift-overflow=2 to check for undefined shift behavior
  Update base code to not rely on undefined overflow behaviour
  Update hisilicon drivers to not rely on undefined overflow behaviour
  Update synopsys drivers to not rely on undefined overflow behaviour
  Update imx platform to not rely on undefined overflow behaviour
  Update mediatek platform to not rely on undefined overflow behaviour
  Update layerscape platform to not rely on undefined overflow behaviour
  Update intel platform to not rely on undefined overflow behaviour
  Update rockchip platform to not rely on undefined overflow behaviour
  Update renesas platform to not rely on undefined overflow behaviour
  Update meson platform to not rely on undefined overflow behaviour
  Update marvell platform to not rely on undefined overflow behaviour
2019-07-16 10:11:27 +00:00
Soby Mathew dc150425c3 Merge "synquacer: Fix compilation fail for SPM support build config" into integration 2019-07-15 15:01:11 +00:00
Madhukar Pappireddy 91e6bef9f5 synquacer: Fix compilation fail for SPM support build config
Fix the header file path

Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: I73a92a3f0049ecbda7eade452405927c04048e01
2019-07-12 09:12:11 -05:00
Toshiyuki Ogasahara 363fb55a91 rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.4
Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I94acd1bb53d9d2453e550e2a13b6391b9088ff8d
2019-07-12 12:11:38 +02:00
Justin Chadwell d3b6df7c3b Update hisilicon drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: I67984b6c48c08af61e95a4dbd18047e2c3151f9a
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-12 09:12:19 +01:00
Justin Chadwell dc5baeb3c2 Update imx platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: Ia0a10b4a30e63c0cbf1d0f8dfe5768e0a93ae1c7
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-12 09:12:19 +01:00
Justin Chadwell 621d5f2a5b Update mediatek platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: If5a88e1b880bcb2be2278398cf5109a6d877e632
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-12 09:12:12 +01:00
John Tsichritzis ec92cbcb6a Merge "plat/intel: Fix SMPLSEL for MMC" into integration 2019-07-11 12:37:26 +00:00
Justin Chadwell 9e4afb0272 Update layerscape platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: Ib63ef6e2e4616dd56828bfd3800d5fe2df109934
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:58 +01:00
Justin Chadwell 36cfbf3ca2 Update intel platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: I4c7a315cb18b3bbe623e7a7a998d2dac869638a7
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:58 +01:00
Justin Chadwell 79ca7807cc Update rockchip platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:58 +01:00
Justin Chadwell 673406b508 Update renesas platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:58 +01:00
Justin Chadwell b19498b97b Update marvell platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: I78f386f5ac171d6e52383a3e42003e6fb3e96b57
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:51 +01:00
Balint Dobszay f363deb6d4 Rename Cortex-Deimos to Cortex-A77
Change-Id: I755e4c42242d9a052570fd1132ca3d937acadb13
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
2019-07-10 12:14:20 +02:00
Tien Hock, Loh 0943ea379f plat/intel: Fix SMPLSEL for MMC
MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
2019-07-10 11:39:03 +08:00
Sandrine Bailleux 21bde92ff6 Merge "plat: imx8m: Add caam module init on imx8m" into integration 2019-07-09 12:33:31 +00:00
Madhukar Pappireddy f6de960fb7 rpi3: Fix compilation error when stack protector is enabled
Include necessary header file to use ARRAY_SIZE() macro

Change-Id: I5b7caccd02c14c598b7944cf4f347606c1e7a8e7
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2019-07-08 10:45:48 -05:00
Sandrine Bailleux ef4b8d5a80 Merge "uniphier: support console based on multi-console" into integration 2019-07-05 11:22:09 +00:00
Masahiro Yamada ac9f1b5555 uniphier: support console based on multi-console
The legacy console is gone. Re-add the console support based on the
multi-console framework.

I am still keeping the putc, getc, and flush callbacks in
uniphier_console.S to use plat/common/aarch64/crash_console_helpers.S

The console registration code already relies on that C environment
has been set up. So, I just filled the struct console fields with the
callback pointers, then called console_register() directly. I also
re-implemented the init function in C to improve the readability.

Removing the custom crash console implementation has one disadvantage;
we cannot use the crash console on very early crashes because
crash_console_helpers.S works only after the console is registered.
I can live with this limitation.

Tested on my boards, and confirmed this worked like before.

Change-Id: Ieab9c849853ff6c525c15ea894a85944f257db59
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-05 18:43:16 +09:00
Andrew F. Davis 93d5e14130 ti: k3: common: Trap all asynchronous bus errors to EL3
These errors are asynchronous and cannot be directly correlated with the
exact current running software, so handling them in the same EL is not
critical. Handling them in TF-A allows for more platform specific
decoding of the implementation defined exception registers

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Iee7a38c9fc9c698fa0ad42dafa598bcbed6a4fda
2019-07-04 12:14:46 -04:00
Jacky Bai 2502709f60 plat: imx8m: Add caam module init on imx8m
CAAM module must be initialized in secure world
before it can be used in non-secure world.

Change-Id: I042893667ddef99d8b6fc3902847d516d8591996
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-07-04 19:59:43 +08:00
Sandrine Bailleux b01e0ad5cd Merge "zynqmp: add support for multi console interface" into integration 2019-07-02 09:58:51 +00:00
Soby Mathew 0d220b3519 Merge changes from topic "banned_api_list" into integration
* changes:
  Fix the License header template in imx_aipstz.c
  docs: Add the list of banned/use with caution APIs
2019-07-01 13:21:23 +00:00
Soby Mathew 2aca35fd9b Fix the License header template in imx_aipstz.c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I2281b3c1b8a0f2caa751c746b7835f998183e0af
2019-07-01 14:16:27 +01:00
Ambroise Vincent 55a08b35b1 zynqmp: add support for multi console interface
This patch addds multi console interface for ZynqMP
platform

Change-Id: I508a61412df2b71d04bca6a1139c8f32cbd7dccd
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2019-07-01 11:35:34 +05:30
Paul Beesley 39c92b6271 Merge changes from topic "av/console-port" into integration
* changes:
  qemu: use new console interface in aarch32
  warp7: remove old console from makefile
  Remove MULTI_CONSOLE_API flag and references to it
  Console: removed legacy console API
2019-06-28 11:04:02 +00:00
Ambroise Vincent e6ffc254a9 qemu: use new console interface in aarch32
Change-Id: Iab788e3e7cb2f83144255c4eb830712fd5cb6240
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Ambroise Vincent 0821731ac3 warp7: remove old console from makefile
Change-Id: I87818b220568cc34838726b32ddf29ee6cf31ed7
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Ambroise Vincent 5b6ebeec9c Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Paul Beesley e54b4dd9da Merge "Tegra: Fix typo in comment" into integration 2019-06-27 09:12:27 +00:00
Paul Beesley 8b95f81ce6 Merge "Tegra: Extend NS address check error output" into integration 2019-06-27 09:11:16 +00:00
Paul Beesley b4c99a9c5d Merge "n1sdp: add code for DDR ECC enablement and BL33 copy to DDR" into integration 2019-06-27 09:07:12 +00:00
Manoj Kumar de8bc83ee9 n1sdp: add code for DDR ECC enablement and BL33 copy to DDR
N1SDP platform supports RDIMMs with ECC capability. To use the ECC
capability, the entire DDR memory space has to be zeroed out before
enabling the ECC bits in DMC620. Zeroing out several gigabytes of
memory from SCP is quite time consuming so functions are added that
zeros out the DDR memory from application processor which is
much faster compared to SCP. BL33 binary cannot be copied to DDR memory
before enabling ECC so this is also done by TF-A from IOFPGA-DDR3
memory to main DDR4 memory after ECC is enabled.

Original PLAT_PHY_ADDR_SPACE_SIZE was limited to 36-bits with which
the entire DDR space cannot be accessed as DRAM2 starts in base
0x8080000000. So these macros are redefined for all ARM platforms.

Change-Id: If09524fb65b421b7a368b1b9fc52c49f2ddb7846
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-06-26 14:07:51 +01:00
Paul Beesley 93c77622a6 Merge changes from topic "pull-out-drivers" into integration
* changes:
  intel: Add ncore ccu driver
  intel: Fix watchdog driver structure
  intel: Fix qspi driver write config
  intel: Pull out common drivers into platform common
2019-06-26 12:08:19 +00:00
Hadi Asyrafi 8a88a2271f intel: Add ncore ccu driver
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I0544315986ee28b23157fdfec3fe5aebae6b860f
2019-06-26 18:45:16 +08:00
Hadi Asyrafi 19e3644528 intel: Fix watchdog driver structure
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I0ffccca7ea83bff35c9f149d7054cd610a59ec01
2019-06-26 18:45:16 +08:00
Hadi Asyrafi 2a16502339 intel: Fix qspi driver write config
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I5241ed97697b0280b590b47b9173d102d23f305a
2019-06-26 18:45:16 +08:00
Hadi Asyrafi bf719f66a7 intel: Pull out common drivers into platform common
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib79e2c6fe6e66dec5004701133ad6a5f4c78f2fa
2019-06-26 18:45:01 +08:00
Marek Vasut 2a690b6dbd rcar_gen3: drivers: pfc: Move PFC drivers out of staging
Now that PFC drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie594b53558c2bfb8e5d88e5b0354752c17a2487e
2019-06-22 17:33:10 +02:00
Andreas Färber 9d74bc300f Tegra: Fix typo in comment
initilise -> initialise

Signed-off-by: Andreas Färber <afaerber@suse.de>
Change-Id: Ib129e6bd48623b6565b669bc674208893a2f7668
2019-06-20 11:34:14 +02:00
Andreas Färber 055b7e91a2 Tegra: Extend NS address check error output
Let bl31_check_ns_address() print the address it doesn't like.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Change-Id: I29a4fb33c24e9f7464ccd2ea44a4608f5cfe5be6
2019-06-20 11:34:14 +02:00
John Tsichritzis fc3c382f2c Merge changes from topic "yg/clk_syscfg_dt" into integration
* changes:
  fdts: stm32mp1: realign device tree files with internal devs
  stm32mp1: increase device tree size to 20kB
  stm32mp1: make dt_get_stdout_node_offset() static
  stm32mp1: use unsigned values for SDMMC defines
  stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
  stm32mp1: update doc for U-Boot compilation
  stm32mp1: add general SYSCFG management
  stm32mp1: move stm32_get_gpio_bank_clock() to private file
  clk: stm32mp1: correctly handle Clock Spreading Generator
  clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
  clk: stm32mp1: move oscillator functions to generic file
  arch: add some defines for generic timer registers
2019-06-19 15:06:00 +00:00
John Tsichritzis de3ad4f096 Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration
* changes:
  rcar_gen3: drivers: qos: Move QoS drivers out of staging
  rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table
  rcar_gen3: drivers: qos: Fix checkpatch issues
  rcar_gen3: drivers: qos: V3M: Drop useless comments
  rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: V3M: Use common register definition
  rcar_gen3: drivers: qos: E3: Drop extra level of nesting
  rcar_gen3: drivers: qos: E3: Use common register definition
  rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros
  rcar_gen3: drivers: qos: D3: Drop MD pin check
  rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()
  rcar_gen3: drivers: qos: D3: Drop useless comments
  rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: D3: Use common register definition
  rcar_gen3: drivers: qos: M3N: Fix checkpatch issues
  rcar_gen3: drivers: qos: M3N: Drop MD pin check
  rcar_gen3: drivers: qos: M3N: Drop useless comments
  rcar_gen3: drivers: qos: M3N: Drop extra level of nesting
  rcar_gen3: drivers: qos: M3N: Use common register definition
  rcar_gen3: drivers: qos: M3W: Fix checkpatch issues
  rcar_gen3: drivers: qos: M3W: Drop MD pin check
  rcar_gen3: drivers: qos: M3W: Drop useless comments
  rcar_gen3: drivers: qos: M3W: Drop extra level of nesting
  rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: M3W: Use common register definition
  rcar_gen3: drivers: qos: H3: Fix checkpatch issues
  rcar_gen3: drivers: qos: H3: Drop MD pin check
  rcar_gen3: drivers: qos: H3: Drop useless comments
  rcar_gen3: drivers: qos: H3: Drop extra level of nesting
  rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: H3: Use common register definition
  rcar_gen3: console: Convert to multi-console API
2019-06-17 13:40:05 +00:00
Marek Vasut c67703ebaa rcar_gen3: drivers: qos: Move QoS drivers out of staging
Now that QoS drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8
2019-06-17 15:13:22 +02:00
Yann Gautier 0a016775ad stm32mp1: increase device tree size to 20kB
Change-Id: Idee966b6434aa038e54b6e7176749a7b65bdbe84
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier f805594d39 stm32mp1: make dt_get_stdout_node_offset() static
Do not export function dt_get_stdout_node_offset() that is used only inside
stm32mp_dt.c source file.

Change-Id: I9dd3dbfab21d42ed81c68723e71fe5a7586dce93
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier 29a5072782 stm32mp1: use unsigned values for SDMMC defines
Correct SDMMC macros to define unsigned values as expected by the
driver implementation.

Change-Id: Ib009f3df2cf26a9759d129eb571a27b2564770ce
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier d304158ed4 stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
Remove inclusion of libfdt source files in source file list since these
are already included from generic libfdt.mk makefile.

Change-Id: If42624557c4d88ca85d70f83b1b08c58f50afe72
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier f33b2433f5 stm32mp1: add general SYSCFG management
The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.

The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.

Device tree files are also updated to manage vdd-supply regulator.

Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00